OpenWrt – Blame information for rev 4
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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4 | office | 1 | / { |
| 2 | #address-cells = <1>; |
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| 3 | #size-cells = <1>; |
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| 4 | compatible = "brcm,bcm6338"; |
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| 5 | |||
| 6 | aliases { |
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| 7 | pflash = &pflash; |
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| 8 | gpio0 = &gpio0; |
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| 9 | serial0 = &uart0; |
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| 10 | spi0 = &lsspi; |
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| 11 | }; |
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| 12 | |||
| 13 | cpus { |
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| 14 | #address-cells = <1>; |
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| 15 | #size-cells = <0>; |
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| 16 | |||
| 17 | cpu@0 { |
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| 18 | compatible = "brcm,bmips3300", "mips,mips4Kc"; |
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| 19 | device_type = "cpu"; |
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| 20 | reg = <0>; |
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| 21 | }; |
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| 22 | }; |
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| 23 | |||
| 24 | cpu_intc: interrupt-controller { |
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| 25 | #address-cells = <0>; |
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| 26 | compatible = "mti,cpu-interrupt-controller"; |
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| 27 | |||
| 28 | interrupt-controller; |
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| 29 | #interrupt-cells = <1>; |
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| 30 | }; |
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| 31 | |||
| 32 | memory { device_type = "memory"; reg = <0 0>; }; |
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| 33 | |||
| 34 | pflash: nor@1fc00000 { |
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| 35 | compatible = "cfi-flash"; |
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| 36 | reg = <0x1fc00000 0x400000>; |
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| 37 | bank-width = <2>; |
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| 38 | #address-cells = <1>; |
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| 39 | #size-cells = <1>; |
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| 40 | |||
| 41 | status = "disabled"; |
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| 42 | }; |
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| 43 | |||
| 44 | ubus@fff00000 { |
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| 45 | #address-cells = <1>; |
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| 46 | #size-cells = <1>; |
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| 47 | ranges; |
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| 48 | compatible = "simple-bus"; |
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| 49 | interrupt-parent = <&periph_intc>; |
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| 50 | |||
| 51 | periph_intc: interrupt-controller@fffe000c { |
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| 52 | compatible = "brcm,bcm6345-l1-intc"; |
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| 53 | reg = <0xfffe000c 0x8>; |
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| 54 | |||
| 55 | interrupt-controller; |
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| 56 | #interrupt-cells = <1>; |
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| 57 | |||
| 58 | interrupt-parent = <&cpu_intc>; |
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| 59 | interrupts = <2>; |
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| 60 | }; |
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| 61 | |||
| 62 | ext_intc: interrupt-controller@fffe0014 { |
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| 63 | compatible = "brcm,bcm6345-ext-intc"; |
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| 64 | reg = <0xfffe0014 0x4>; |
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| 65 | |||
| 66 | interrupt-controller; |
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| 67 | #interrupt-cells = <2>; |
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| 68 | |||
| 69 | interrupt-parent = <&cpu_intc>; |
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| 70 | interrupts = <3>, <4>, <5>, <6>; |
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| 71 | }; |
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| 72 | |||
| 73 | gpio0: gpio-controller@fffe0404 { |
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| 74 | compatible = "brcm,bcm6345-gpio"; |
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| 75 | reg = <0xfffe0404 4>, <0xfffe040c 4>; |
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| 76 | |||
| 77 | gpio-controller; |
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| 78 | #gpio-cells = <2>; |
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| 79 | |||
| 80 | ngpios = <8>; |
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| 81 | }; |
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| 82 | |||
| 83 | uart0: serial@fffe0300 { |
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| 84 | compatible = "brcm,bcm6345-uart"; |
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| 85 | reg = <0xfffe0300 0x18>; |
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| 86 | |||
| 87 | interrupt-parent = <&periph_intc>; |
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| 88 | interrupts = <2>; |
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| 89 | |||
| 90 | /* clocks = <&periph_clk>; */ |
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| 91 | /* clock-names = "refclk"; */ |
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| 92 | |||
| 93 | status = "disabled"; |
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| 94 | }; |
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| 95 | |||
| 96 | lsspi: spi@fffe0c00 { |
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| 97 | #address-cells = <1>; |
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| 98 | #size-cells = <0>; |
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| 99 | compatible = "brcm,bcm6348-spi"; |
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| 100 | reg = <0xfffe0c00 0x40>; |
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| 101 | interrupts = <1>; |
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| 102 | /* clocks = <&clkctl 9>; */ |
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| 103 | }; |
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| 104 | }; |
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| 105 | }; |