OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | --- a/arch/mips/ath79/mach-pb44.c |
2 | +++ b/arch/mips/ath79/mach-pb44.c |
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3 | @@ -8,23 +8,48 @@ |
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4 | * by the Free Software Foundation. |
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5 | */ |
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6 | |||
7 | +#include <linux/delay.h> |
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8 | #include <linux/init.h> |
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9 | #include <linux/platform_device.h> |
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10 | #include <linux/i2c.h> |
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11 | #include <linux/i2c-gpio.h> |
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12 | #include <linux/i2c/pcf857x.h> |
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13 | +#include <linux/i2c/pcf857x.h> |
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14 | +#include <linux/spi/flash.h> |
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15 | +#include <linux/spi/vsc7385.h> |
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16 | |||
17 | -#include "machtypes.h" |
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18 | +#include <asm/mach-ath79/ar71xx_regs.h> |
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19 | +#include <asm/mach-ath79/ath79.h> |
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20 | + |
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21 | +#include "dev-eth.h" |
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22 | #include "dev-gpio-buttons.h" |
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23 | #include "dev-leds-gpio.h" |
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24 | #include "dev-spi.h" |
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25 | #include "dev-usb.h" |
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26 | +#include "machtypes.h" |
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27 | #include "pci.h" |
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28 | |||
29 | #define PB44_GPIO_I2C_SCL 0 |
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30 | #define PB44_GPIO_I2C_SDA 1 |
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31 | |||
32 | +#define PB44_PCF8757_VSC7395_CS 0 |
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33 | +#define PB44_PCF8757_STEREO_CS 1 |
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34 | +#define PB44_PCF8757_SLIC_CS0 2 |
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35 | +#define PB44_PCF8757_SLIC_TEST 3 |
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36 | +#define PB44_PCF8757_SLIC_INT0 4 |
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37 | +#define PB44_PCF8757_SLIC_INT1 5 |
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38 | +#define PB44_PCF8757_SW_RESET 6 |
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39 | +#define PB44_PCF8757_SW_JUMP 8 |
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40 | +#define PB44_PCF8757_LED_JUMP1 9 |
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41 | +#define PB44_PCF8757_LED_JUMP2 10 |
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42 | +#define PB44_PCF8757_TP24 11 |
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43 | +#define PB44_PCF8757_TP25 12 |
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44 | +#define PB44_PCF8757_TP26 13 |
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45 | +#define PB44_PCF8757_TP27 14 |
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46 | +#define PB44_PCF8757_TP28 15 |
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47 | + |
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48 | #define PB44_GPIO_EXP_BASE 16 |
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49 | +#define PB44_GPIO_VSC7395_CS (PB44_GPIO_EXP_BASE + PB44_PCF8757_VSC7395_CS) |
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50 | #define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) |
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51 | #define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) |
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52 | #define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) |
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53 | @@ -87,20 +112,59 @@ static struct gpio_keys_button pb44_gpio |
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54 | } |
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55 | }; |
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56 | |||
57 | +static void pb44_vsc7395_reset(void) |
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58 | +{ |
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59 | + ath79_device_reset_set(AR71XX_RESET_GE1_PHY); |
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60 | + udelay(10); |
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61 | + ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); |
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62 | + mdelay(50); |
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63 | +} |
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64 | + |
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65 | +static struct vsc7385_platform_data pb44_vsc7395_data = { |
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66 | + .reset = pb44_vsc7395_reset, |
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67 | + .ucode_name = "vsc7395_ucode_pb44.bin", |
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68 | + .mac_cfg = { |
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69 | + .tx_ipg = 6, |
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70 | + .bit2 = 1, |
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71 | + .clk_sel = 0, |
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72 | + }, |
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73 | +}; |
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74 | + |
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75 | +static const char *pb44_part_probes[] = { |
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76 | + "RedBoot", |
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77 | + NULL, |
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78 | +}; |
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79 | + |
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80 | +static struct flash_platform_data pb44_flash_data = { |
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81 | + .part_probes = pb44_part_probes, |
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82 | +}; |
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83 | + |
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84 | static struct spi_board_info pb44_spi_info[] = { |
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85 | { |
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86 | .bus_num = 0, |
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87 | .chip_select = 0, |
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88 | .max_speed_hz = 25000000, |
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89 | .modalias = "m25p64", |
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90 | + .platform_data = &pb44_flash_data, |
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91 | }, |
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92 | + { |
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93 | + .bus_num = 0, |
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94 | + .chip_select = 1, |
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95 | + .max_speed_hz = 25000000, |
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96 | + .modalias = "spi-vsc7385", |
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97 | + .platform_data = &pb44_vsc7395_data, |
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98 | + } |
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99 | }; |
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100 | |||
101 | static struct ath79_spi_platform_data pb44_spi_data = { |
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102 | .bus_num = 0, |
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103 | - .num_chipselect = 1, |
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104 | + .num_chipselect = 2, |
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105 | }; |
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106 | |||
107 | +#define PB44_WAN_PHYMASK BIT(0) |
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108 | +#define PB44_LAN_PHYMASK 0 |
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109 | +#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK) |
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110 | + |
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111 | static void __init pb44_init(void) |
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112 | { |
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113 | i2c_register_board_info(0, pb44_i2c_board_info, |
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114 | @@ -116,6 +180,22 @@ static void __init pb44_init(void) |
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115 | ARRAY_SIZE(pb44_spi_info)); |
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116 | ath79_register_usb(); |
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117 | ath79_register_pci(); |
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118 | + |
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119 | + ath79_register_mdio(0, ~PB44_MDIO_PHYMASK); |
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120 | + |
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121 | + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); |
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122 | + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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123 | + ath79_eth0_data.phy_mask = PB44_WAN_PHYMASK; |
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124 | + |
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125 | + ath79_register_eth(0); |
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126 | + |
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127 | + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); |
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128 | + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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129 | + ath79_eth1_data.speed = SPEED_1000; |
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130 | + ath79_eth1_data.duplex = DUPLEX_FULL; |
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131 | + ath79_eth1_pll_data.pll_1000 = 0x110000; |
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132 | + |
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133 | + ath79_register_eth(1); |
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134 | } |
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135 | |||
136 | MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", |
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137 | --- a/arch/mips/ath79/Kconfig |
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138 | +++ b/arch/mips/ath79/Kconfig |
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139 | @@ -57,6 +57,7 @@ config ATH79_MACH_DB120 |
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140 | config ATH79_MACH_PB44 |
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141 | bool "Atheros PB44 reference board" |
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142 | select SOC_AR71XX |
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143 | + select ATH79_DEV_ETH |
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144 | select ATH79_DEV_GPIO_BUTTONS |
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145 | select ATH79_DEV_LEDS_GPIO |
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146 | select ATH79_DEV_SPI |