OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | --- a/arch/mips/Kconfig |
2 | +++ b/arch/mips/Kconfig |
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3 | @@ -196,7 +196,6 @@ config ATH79 |
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4 | select SYS_SUPPORTS_BIG_ENDIAN |
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5 | select SYS_SUPPORTS_MIPS16 |
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6 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
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7 | - select USE_OF |
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8 | help |
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9 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. |
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10 | |||
11 | --- a/arch/mips/ath79/setup.c |
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12 | +++ b/arch/mips/ath79/setup.c |
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13 | @@ -196,16 +196,20 @@ unsigned int get_c0_compare_int(void) |
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14 | |||
15 | void __init plat_mem_setup(void) |
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16 | { |
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17 | +#ifdef CONFIG_OF |
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18 | unsigned long fdt_start; |
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19 | +#endif |
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20 | |||
21 | set_io_port_base(KSEG1); |
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22 | |||
23 | +#ifdef CONFIG_OF |
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24 | /* Get the position of the FDT passed by the bootloader */ |
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25 | fdt_start = fw_getenvl("fdt_start"); |
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26 | if (fdt_start) |
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27 | __dt_setup_arch((void *)KSEG0ADDR(fdt_start)); |
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28 | else if (fw_passed_dtb) |
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29 | __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb)); |
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30 | +#endif |
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31 | |||
32 | if (mips_machtype != ATH79_MACH_GENERIC_OF) { |
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33 | ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, |
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34 | @@ -301,17 +305,21 @@ static int __init ath79_setup(void) |
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35 | |||
36 | arch_initcall(ath79_setup); |
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37 | |||
38 | +#ifdef CONFIG_OF |
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39 | void __init device_tree_init(void) |
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40 | { |
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41 | unflatten_and_copy_device_tree(); |
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42 | } |
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43 | +#endif |
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44 | |||
45 | MIPS_MACHINE(ATH79_MACH_GENERIC, |
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46 | "Generic", |
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47 | "Generic AR71XX/AR724X/AR913X based board", |
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48 | NULL); |
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49 | |||
50 | +#ifdef CONFIG_OF |
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51 | MIPS_MACHINE(ATH79_MACH_GENERIC_OF, |
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52 | "DTB", |
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53 | "Generic AR71XX/AR724X/AR913X based board (DT)", |
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54 | NULL); |
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55 | +#endif |
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56 | --- a/arch/mips/ath79/clock.c |
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57 | +++ b/arch/mips/ath79/clock.c |
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58 | @@ -33,10 +33,12 @@ |
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59 | #define AR724X_BASE_FREQ 40000000 |
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60 | |||
61 | static struct clk *clks[ATH79_CLK_END]; |
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62 | +#ifdef CONFIG_OF |
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63 | static struct clk_onecell_data clk_data = { |
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64 | .clks = clks, |
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65 | .clk_num = ARRAY_SIZE(clks), |
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66 | }; |
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67 | +#endif |
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68 | |||
69 | static struct clk *__init ath79_add_sys_clkdev( |
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70 | const char *id, unsigned long rate) |