OpenWrt – Blame information for rev 4

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Rev Author Line No. Line
4 office 1 --- /dev/null
2 +++ b/arch/mips/ath79/gpio.c
3 @@ -0,0 +1,59 @@
4 +/*
5 + * Atheros AR71XX/AR724X/AR913X GPIO API support
6 + *
7 + * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
8 + * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
9 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
10 + *
11 + * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
12 + *
13 + * This program is free software; you can redistribute it and/or modify it
14 + * under the terms of the GNU General Public License version 2 as published
15 + * by the Free Software Foundation.
16 + */
17 +#include <linux/kernel.h>
18 +#include <linux/module.h>
19 +#include <linux/io.h>
20 +#include <linux/gpio.h>
21 +#include <asm/mach-ath79/ar71xx_regs.h>
22 +#include <asm/mach-ath79/ath79.h>
23 +#include "common.h"
24 +
25 +void __iomem *ath79_gpio_base;
26 +EXPORT_SYMBOL_GPL(ath79_gpio_base);
27 +
28 +static void __iomem *ath79_gpio_get_function_reg(void)
29 +{
30 + u32 reg = 0;
31 +
32 + if (soc_is_ar71xx() ||
33 + soc_is_ar724x() ||
34 + soc_is_ar913x() ||
35 + soc_is_ar933x())
36 + reg = AR71XX_GPIO_REG_FUNC;
37 + else if (soc_is_ar934x())
38 + reg = AR934X_GPIO_REG_FUNC;
39 + else
40 + BUG();
41 +
42 + return ath79_gpio_base + reg;
43 +}
44 +
45 +void ath79_gpio_function_setup(u32 set, u32 clear)
46 +{
47 + void __iomem *reg = ath79_gpio_get_function_reg();
48 +
49 + __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
50 + /* flush write */
51 + __raw_readl(reg);
52 +}
53 +
54 +void ath79_gpio_function_enable(u32 mask)
55 +{
56 + ath79_gpio_function_setup(mask, 0);
57 +}
58 +
59 +void ath79_gpio_function_disable(u32 mask)
60 +{
61 + ath79_gpio_function_setup(0, mask);
62 +}
63 --- a/arch/mips/include/asm/mach-ath79/ath79.h
64 +++ b/arch/mips/include/asm/mach-ath79/ath79.h
65 @@ -118,6 +118,7 @@ static inline int soc_is_qca955x(void)
66 void ath79_ddr_wb_flush(unsigned int reg);
67 void ath79_ddr_set_pci_windows(void);
68  
69 +extern void __iomem *ath79_gpio_base;
70 extern void __iomem *ath79_pll_base;
71 extern void __iomem *ath79_reset_base;
72  
73 --- a/arch/mips/ath79/dev-common.c
74 +++ b/arch/mips/ath79/dev-common.c
75 @@ -156,4 +156,5 @@ void __init ath79_gpio_init(void)
76 }
77  
78 platform_device_register(&ath79_gpio_device);
79 + ath79_gpio_base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
80 }
81 --- a/arch/mips/ath79/common.h
82 +++ b/arch/mips/ath79/common.h
83 @@ -24,6 +24,9 @@ unsigned long ath79_get_sys_clk_rate(con
84  
85 void ath79_ddr_ctrl_init(void);
86  
87 +void ath79_gpio_function_enable(u32 mask);
88 +void ath79_gpio_function_disable(u32 mask);
89 +void ath79_gpio_function_setup(u32 set, u32 clear);
90 void ath79_gpio_init(void);
91  
92 #endif /* __ATH79_COMMON_H */