OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | /* |
2 | * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards |
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3 | * |
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4 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License version 2 as published |
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8 | * by the Free Software Foundation. |
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9 | */ |
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10 | |||
11 | #include <stddef.h> |
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12 | #include "config.h" |
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13 | #include "ar71xx_regs.h" |
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14 | |||
15 | #define READREG(r) *(volatile unsigned int *)(r) |
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16 | #define WRITEREG(r,v) *(volatile unsigned int *)(r) = v |
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17 | |||
18 | #define KSEG1ADDR(_x) (((_x) & 0x1fffffff) | 0xa0000000) |
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19 | |||
20 | #define UART_BASE 0xb8020000 |
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21 | |||
22 | #define UART_TX 0 |
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23 | #define UART_LSR 5 |
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24 | |||
25 | #define UART_LSR_THRE 0x20 |
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26 | |||
27 | #define UART_READ(r) READREG(UART_BASE + 4 * (r)) |
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28 | #define UART_WRITE(r,v) WRITEREG(UART_BASE + 4 * (r), (v)) |
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29 | |||
30 | void board_putc(int ch) |
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31 | { |
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32 | while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0); |
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33 | UART_WRITE(UART_TX, ch); |
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34 | while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0); |
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35 | } |
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36 | |||
37 | #ifdef CONFIG_BOARD_TL_WR1043ND_V1 |
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38 | static void tlwr1043nd_init(void) |
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39 | { |
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40 | unsigned int reg = KSEG1ADDR(AR71XX_RESET_BASE); |
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41 | unsigned int t; |
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42 | |||
43 | t = READREG(reg + AR913X_RESET_REG_RESET_MODULE); |
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44 | t |= AR71XX_RESET_GE0_PHY; |
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45 | WRITEREG(reg + AR913X_RESET_REG_RESET_MODULE, t); |
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46 | /* flush write */ |
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47 | t = READREG(reg + AR913X_RESET_REG_RESET_MODULE); |
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48 | } |
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49 | #else |
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50 | static inline void tlwr1043nd_init(void) {} |
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51 | #endif |
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52 | |||
53 | void board_init(void) |
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54 | { |
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55 | tlwr1043nd_init(); |
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56 | } |