OpenWrt – Blame information for rev 4
?pathlinks?
Rev | Author | Line No. | Line |
---|---|---|---|
4 | office | 1 | /* |
2 | * SPI driver for the CPLD chip on the Mikrotik RB4xx boards |
||
3 | * |
||
4 | * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> |
||
5 | * |
||
6 | * This file was based on the patches for Linux 2.6.27.39 published by |
||
7 | * MikroTik for their RouterBoard 4xx series devices. |
||
8 | * |
||
9 | * This program is free software; you can redistribute it and/or modify it |
||
10 | * under the terms of the GNU General Public License version 2 as published |
||
11 | * by the Free Software Foundation. |
||
12 | */ |
||
13 | |||
14 | #include <linux/types.h> |
||
15 | #include <linux/kernel.h> |
||
16 | #include <linux/module.h> |
||
17 | #include <linux/init.h> |
||
18 | #include <linux/module.h> |
||
19 | #include <linux/device.h> |
||
20 | #include <linux/bitops.h> |
||
21 | #include <linux/spi/spi.h> |
||
22 | #include <linux/gpio.h> |
||
23 | #include <linux/slab.h> |
||
24 | #include <linux/version.h> |
||
25 | |||
26 | #include <asm/mach-ath79/rb4xx_cpld.h> |
||
27 | |||
28 | #define DRV_NAME "spi-rb4xx-cpld" |
||
29 | #define DRV_DESC "RB4xx CPLD driver" |
||
30 | #define DRV_VERSION "0.1.0" |
||
31 | |||
32 | #define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */ |
||
33 | #define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */ |
||
34 | #define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */ |
||
35 | #define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */ |
||
36 | #define CPLD_CMD_LED5_ON 0x0c /* send cmd */ |
||
37 | #define CPLD_CMD_LED5_OFF 0x0d /* send cmd */ |
||
38 | |||
39 | struct rb4xx_cpld { |
||
40 | struct spi_device *spi; |
||
41 | struct mutex lock; |
||
42 | struct gpio_chip chip; |
||
43 | unsigned int config; |
||
44 | }; |
||
45 | |||
46 | static struct rb4xx_cpld *rb4xx_cpld; |
||
47 | |||
48 | static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip) |
||
49 | { |
||
50 | return container_of(chip, struct rb4xx_cpld, chip); |
||
51 | } |
||
52 | |||
53 | static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd) |
||
54 | { |
||
55 | struct spi_transfer t[1]; |
||
56 | struct spi_message m; |
||
57 | unsigned char tx_buf[1]; |
||
58 | int err; |
||
59 | |||
60 | spi_message_init(&m); |
||
61 | memset(&t, 0, sizeof(t)); |
||
62 | |||
63 | t[0].tx_buf = tx_buf; |
||
64 | t[0].len = sizeof(tx_buf); |
||
65 | spi_message_add_tail(&t[0], &m); |
||
66 | |||
67 | tx_buf[0] = cmd; |
||
68 | |||
69 | err = spi_sync(cpld->spi, &m); |
||
70 | return err; |
||
71 | } |
||
72 | |||
73 | static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config) |
||
74 | { |
||
75 | struct spi_transfer t[1]; |
||
76 | struct spi_message m; |
||
77 | unsigned char cmd[2]; |
||
78 | int err; |
||
79 | |||
80 | spi_message_init(&m); |
||
81 | memset(&t, 0, sizeof(t)); |
||
82 | |||
83 | t[0].tx_buf = cmd; |
||
84 | t[0].len = sizeof(cmd); |
||
85 | spi_message_add_tail(&t[0], &m); |
||
86 | |||
87 | cmd[0] = CPLD_CMD_WRITE_CFG; |
||
88 | cmd[1] = config; |
||
89 | |||
90 | err = spi_sync(cpld->spi, &m); |
||
91 | return err; |
||
92 | } |
||
93 | |||
94 | static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask, |
||
95 | unsigned value) |
||
96 | { |
||
97 | unsigned int config; |
||
98 | int err; |
||
99 | |||
100 | config = cpld->config & ~mask; |
||
101 | config |= value; |
||
102 | |||
103 | if ((cpld->config ^ config) & 0xff) { |
||
104 | err = rb4xx_cpld_write_cfg(cpld, config); |
||
105 | if (err) |
||
106 | return err; |
||
107 | } |
||
108 | |||
109 | if ((cpld->config ^ config) & CPLD_CFG_nLED5) { |
||
110 | err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON : |
||
111 | CPLD_CMD_LED5_OFF); |
||
112 | if (err) |
||
113 | return err; |
||
114 | } |
||
115 | |||
116 | cpld->config = config; |
||
117 | return 0; |
||
118 | } |
||
119 | |||
120 | int rb4xx_cpld_change_cfg(unsigned mask, unsigned value) |
||
121 | { |
||
122 | int ret; |
||
123 | |||
124 | if (rb4xx_cpld == NULL) |
||
125 | return -ENODEV; |
||
126 | |||
127 | mutex_lock(&rb4xx_cpld->lock); |
||
128 | ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value); |
||
129 | mutex_unlock(&rb4xx_cpld->lock); |
||
130 | |||
131 | return ret; |
||
132 | } |
||
133 | EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg); |
||
134 | |||
135 | int rb4xx_cpld_read(unsigned char *rx_buf, unsigned count) |
||
136 | { |
||
137 | static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 }; |
||
138 | struct spi_transfer t[2] = { |
||
139 | { |
||
140 | .tx_buf = &cmd, |
||
141 | .len = 2, |
||
142 | }, { |
||
143 | .rx_buf = rx_buf, |
||
144 | .len = count, |
||
145 | }, |
||
146 | }; |
||
147 | struct spi_message m; |
||
148 | |||
149 | if (rb4xx_cpld == NULL) |
||
150 | return -ENODEV; |
||
151 | |||
152 | spi_message_init(&m); |
||
153 | spi_message_add_tail(&t[0], &m); |
||
154 | spi_message_add_tail(&t[1], &m); |
||
155 | return spi_sync(rb4xx_cpld->spi, &m); |
||
156 | } |
||
157 | EXPORT_SYMBOL_GPL(rb4xx_cpld_read); |
||
158 | |||
159 | int rb4xx_cpld_write(const unsigned char *buf, unsigned count) |
||
160 | { |
||
161 | static const unsigned char cmd = CPLD_CMD_WRITE_NAND; |
||
162 | struct spi_transfer t[3] = { |
||
163 | { |
||
164 | .tx_buf = &cmd, |
||
165 | .len = 1, |
||
166 | }, { |
||
167 | .tx_buf = buf, |
||
168 | .len = count, |
||
169 | .tx_nbits = SPI_NBITS_DUAL, |
||
170 | }, { |
||
171 | .len = 1, |
||
172 | .tx_nbits = SPI_NBITS_DUAL, |
||
173 | }, |
||
174 | }; |
||
175 | struct spi_message m; |
||
176 | |||
177 | if (rb4xx_cpld == NULL) |
||
178 | return -ENODEV; |
||
179 | |||
180 | spi_message_init(&m); |
||
181 | spi_message_add_tail(&t[0], &m); |
||
182 | spi_message_add_tail(&t[1], &m); |
||
183 | spi_message_add_tail(&t[2], &m); |
||
184 | return spi_sync(rb4xx_cpld->spi, &m); |
||
185 | } |
||
186 | EXPORT_SYMBOL_GPL(rb4xx_cpld_write); |
||
187 | |||
188 | static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset) |
||
189 | { |
||
190 | struct rb4xx_cpld *cpld = gpio_to_cpld(chip); |
||
191 | int ret; |
||
192 | |||
193 | mutex_lock(&cpld->lock); |
||
194 | ret = (cpld->config >> offset) & 1; |
||
195 | mutex_unlock(&cpld->lock); |
||
196 | |||
197 | return ret; |
||
198 | } |
||
199 | |||
200 | static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset, |
||
201 | int value) |
||
202 | { |
||
203 | struct rb4xx_cpld *cpld = gpio_to_cpld(chip); |
||
204 | |||
205 | mutex_lock(&cpld->lock); |
||
206 | __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); |
||
207 | mutex_unlock(&cpld->lock); |
||
208 | } |
||
209 | |||
210 | static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip, |
||
211 | unsigned offset) |
||
212 | { |
||
213 | return -EOPNOTSUPP; |
||
214 | } |
||
215 | |||
216 | static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip, |
||
217 | unsigned offset, |
||
218 | int value) |
||
219 | { |
||
220 | struct rb4xx_cpld *cpld = gpio_to_cpld(chip); |
||
221 | int ret; |
||
222 | |||
223 | mutex_lock(&cpld->lock); |
||
224 | ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); |
||
225 | mutex_unlock(&cpld->lock); |
||
226 | |||
227 | return ret; |
||
228 | } |
||
229 | |||
230 | static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base) |
||
231 | { |
||
232 | int err; |
||
233 | |||
234 | /* init config */ |
||
235 | cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 | |
||
236 | CPLD_CFG_nLED4 | CPLD_CFG_nCE; |
||
237 | rb4xx_cpld_write_cfg(cpld, cpld->config); |
||
238 | |||
239 | /* setup GPIO chip */ |
||
240 | cpld->chip.label = DRV_NAME; |
||
241 | |||
242 | cpld->chip.get = rb4xx_cpld_gpio_get; |
||
243 | cpld->chip.set = rb4xx_cpld_gpio_set; |
||
244 | cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input; |
||
245 | cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output; |
||
246 | |||
247 | cpld->chip.base = base; |
||
248 | cpld->chip.ngpio = CPLD_NUM_GPIOS; |
||
249 | cpld->chip.can_sleep = 1; |
||
250 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) |
||
251 | cpld->chip.dev = &cpld->spi->dev; |
||
252 | #else |
||
253 | cpld->chip.parent = &cpld->spi->dev; |
||
254 | #endif |
||
255 | cpld->chip.owner = THIS_MODULE; |
||
256 | |||
257 | err = gpiochip_add(&cpld->chip); |
||
258 | if (err) |
||
259 | dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n", |
||
260 | err); |
||
261 | |||
262 | return err; |
||
263 | } |
||
264 | |||
265 | static int rb4xx_cpld_probe(struct spi_device *spi) |
||
266 | { |
||
267 | struct rb4xx_cpld *cpld; |
||
268 | struct rb4xx_cpld_platform_data *pdata; |
||
269 | int err; |
||
270 | |||
271 | pdata = spi->dev.platform_data; |
||
272 | if (!pdata) { |
||
273 | dev_dbg(&spi->dev, "no platform data\n"); |
||
274 | return -EINVAL; |
||
275 | } |
||
276 | |||
277 | cpld = kzalloc(sizeof(*cpld), GFP_KERNEL); |
||
278 | if (!cpld) { |
||
279 | dev_err(&spi->dev, "no memory for private data\n"); |
||
280 | return -ENOMEM; |
||
281 | } |
||
282 | |||
283 | mutex_init(&cpld->lock); |
||
284 | cpld->spi = spi_dev_get(spi); |
||
285 | dev_set_drvdata(&spi->dev, cpld); |
||
286 | |||
287 | spi->mode = SPI_MODE_0 | SPI_TX_DUAL; |
||
288 | spi->bits_per_word = 8; |
||
289 | err = spi_setup(spi); |
||
290 | if (err) { |
||
291 | dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); |
||
292 | goto err_drvdata; |
||
293 | } |
||
294 | |||
295 | err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base); |
||
296 | if (err) |
||
297 | goto err_drvdata; |
||
298 | |||
299 | rb4xx_cpld = cpld; |
||
300 | |||
301 | return 0; |
||
302 | |||
303 | err_drvdata: |
||
304 | dev_set_drvdata(&spi->dev, NULL); |
||
305 | kfree(cpld); |
||
306 | |||
307 | return err; |
||
308 | } |
||
309 | |||
310 | static int rb4xx_cpld_remove(struct spi_device *spi) |
||
311 | { |
||
312 | struct rb4xx_cpld *cpld; |
||
313 | |||
314 | rb4xx_cpld = NULL; |
||
315 | cpld = dev_get_drvdata(&spi->dev); |
||
316 | dev_set_drvdata(&spi->dev, NULL); |
||
317 | kfree(cpld); |
||
318 | |||
319 | return 0; |
||
320 | } |
||
321 | |||
322 | static struct spi_driver rb4xx_cpld_driver = { |
||
323 | .driver = { |
||
324 | .name = DRV_NAME, |
||
325 | .bus = &spi_bus_type, |
||
326 | .owner = THIS_MODULE, |
||
327 | }, |
||
328 | .probe = rb4xx_cpld_probe, |
||
329 | .remove = rb4xx_cpld_remove, |
||
330 | }; |
||
331 | |||
332 | static int __init rb4xx_cpld_init(void) |
||
333 | { |
||
334 | return spi_register_driver(&rb4xx_cpld_driver); |
||
335 | } |
||
336 | module_init(rb4xx_cpld_init); |
||
337 | |||
338 | static void __exit rb4xx_cpld_exit(void) |
||
339 | { |
||
340 | spi_unregister_driver(&rb4xx_cpld_driver); |
||
341 | } |
||
342 | module_exit(rb4xx_cpld_exit); |
||
343 | |||
344 | MODULE_DESCRIPTION(DRV_DESC); |
||
345 | MODULE_VERSION(DRV_VERSION); |
||
346 | MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); |
||
347 | MODULE_LICENSE("GPL v2"); |