OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | /* |
2 | * TP-Link TL-WR942N(RU) v1 board support |
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3 | * |
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4 | * Copyright (C) 2017 Sergey Studzinski <serguzhg@gmail.com> |
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5 | * Thanks to Henryk Heisig <hyniu@o2.pl> |
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6 | * |
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7 | * This program is free software; you can redistribute it and/or modify it |
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8 | * under the terms of the GNU General Public License version 2 as published |
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9 | * by the Free Software Foundation. |
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10 | */ |
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11 | |||
12 | #include <linux/platform_device.h> |
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13 | #include <linux/ath9k_platform.h> |
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14 | #include <asm/mach-ath79/ar71xx_regs.h> |
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15 | #include <linux/gpio.h> |
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16 | #include <linux/init.h> |
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17 | #include <linux/spi/spi_gpio.h> |
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18 | #include <linux/spi/74x164.h> |
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19 | |||
20 | #include "common.h" |
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21 | #include "dev-m25p80.h" |
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22 | #include "machtypes.h" |
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23 | #include "dev-eth.h" |
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24 | #include "dev-gpio-buttons.h" |
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25 | #include "dev-leds-gpio.h" |
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26 | #include "dev-spi.h" |
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27 | #include "dev-usb.h" |
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28 | #include "dev-wmac.h" |
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29 | #include "nvram.h" |
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30 | |||
31 | #define TL_WR942N_V1_KEYS_POLL_INTERVAL 20 |
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32 | #define TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL \ |
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33 | (3 * TL_WR942N_V1_KEYS_POLL_INTERVAL) |
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34 | |||
35 | #define TL_WR942N_V1_GPIO_BTN_RESET 1 |
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36 | #define TL_WR942N_V1_GPIO_BTN_RFKILL 2 |
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37 | |||
38 | #define TL_WR942N_V1_GPIO_UART_TX 4 |
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39 | #define TL_WR942N_V1_GPIO_UART_RX 5 |
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40 | |||
41 | #define TL_WR942N_V1_GPIO_LED_USB2 14 |
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42 | #define TL_WR942N_V1_GPIO_LED_USB1 15 |
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43 | |||
44 | #define TL_WR942N_V1_GPIO_SHIFT_OE 16 |
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45 | #define TL_WR942N_V1_GPIO_SHIFT_SER 17 |
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46 | #define TL_WR942N_V1_GPIO_SHIFT_SRCLK 18 |
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47 | #define TL_WR942N_V1_GPIO_SHIFT_SRCLR 19 |
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48 | #define TL_WR942N_V1_GPIO_SHIFT_RCLK 20 |
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49 | #define TL_WR942N_V1_GPIO_LED_WPS 21 |
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50 | #define TL_WR942N_V1_GPIO_LED_STATUS 22 |
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51 | |||
52 | #define TL_WR942N_V1_74HC_GPIO_BASE 32 |
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53 | #define TL_WR942N_V1_74HC_GPIO_LED_LAN4 (TL_WR942N_V1_74HC_GPIO_BASE + 0) |
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54 | #define TL_WR942N_V1_74HC_GPIO_LED_LAN3 (TL_WR942N_V1_74HC_GPIO_BASE + 1) |
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55 | #define TL_WR942N_V1_74HC_GPIO_LED_LAN2 (TL_WR942N_V1_74HC_GPIO_BASE + 2) |
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56 | #define TL_WR942N_V1_74HC_GPIO_LED_LAN1 (TL_WR942N_V1_74HC_GPIO_BASE + 3) |
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57 | #define TL_WR942N_V1_74HC_GPIO_LED_WAN_GREEN (TL_WR942N_V1_74HC_GPIO_BASE + 4) |
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58 | #define TL_WR942N_V1_74HC_GPIO_LED_WAN_AMBER (TL_WR942N_V1_74HC_GPIO_BASE + 5) |
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59 | #define TL_WR942N_V1_74HC_GPIO_LED_WLAN (TL_WR942N_V1_74HC_GPIO_BASE + 6) |
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60 | #define TL_WR942N_V1_74HC_GPIO_HUB_RESET (TL_WR942N_V1_74HC_GPIO_BASE + 7) /* from u-boot sources */ |
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61 | |||
62 | #define TL_WR942N_V1_SSR_BIT_0 0 |
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63 | #define TL_WR942N_V1_SSR_BIT_1 1 |
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64 | #define TL_WR942N_V1_SSR_BIT_2 2 |
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65 | #define TL_WR942N_V1_SSR_BIT_3 3 |
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66 | #define TL_WR942N_V1_SSR_BIT_4 4 |
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67 | #define TL_WR942N_V1_SSR_BIT_5 5 |
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68 | #define TL_WR942N_V1_SSR_BIT_6 6 |
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69 | #define TL_WR942N_V1_SSR_BIT_7 7 |
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70 | |||
71 | #define TL_WR942N_V1_WMAC_CALDATA_OFFSET 0x1000 |
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72 | #define TL_WR942N_V1_DEFAULT_MAC_ADDR 0x1fe40008 |
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73 | #define TL_WR942N_V1_DEFAULT_MAC_SIZE 0x200 |
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74 | |||
75 | #define GPIO_IN_ENABLE0_UART_SIN_LSB 8 |
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76 | #define GPIO_IN_ENABLE0_UART_SIN_MASK 0x0000ff00 |
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77 | |||
78 | static struct gpio_led tl_wr942n_v1_leds_gpio[] __initdata = { |
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79 | { |
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80 | .name = "tl-wr942n-v1:green:status", |
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81 | .gpio = TL_WR942N_V1_GPIO_LED_STATUS, |
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82 | .active_low = 1, |
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83 | }, { |
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84 | .name = "tl-wr942n-v1:green:wlan", |
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85 | .gpio = TL_WR942N_V1_74HC_GPIO_LED_WLAN, |
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86 | .active_low = 1, |
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87 | }, { |
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88 | .name = "tl-wr942n-v1:green:lan1", |
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89 | .gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN1, |
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90 | .active_low = 1, |
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91 | }, { |
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92 | .name = "tl-wr942n-v1:green:lan2", |
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93 | .gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN2, |
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94 | .active_low = 1, |
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95 | }, { |
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96 | .name = "tl-wr942n-v1:green:lan3", |
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97 | .gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN3, |
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98 | .active_low = 1, |
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99 | }, { |
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100 | .name = "tl-wr942n-v1:green:lan4", |
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101 | .gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN4, |
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102 | .active_low = 1, |
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103 | }, { |
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104 | .name = "tl-wr942n-v1:green:wan", |
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105 | .gpio = TL_WR942N_V1_74HC_GPIO_LED_WAN_GREEN, |
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106 | .active_low = 1, |
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107 | }, { |
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108 | .name = "tl-wr942n-v1:amber:wan", |
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109 | .gpio = TL_WR942N_V1_74HC_GPIO_LED_WAN_AMBER, |
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110 | .active_low = 1, |
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111 | }, { |
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112 | .name = "tl-wr942n-v1:green:wps", |
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113 | .gpio = TL_WR942N_V1_GPIO_LED_WPS, |
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114 | .active_low = 1, |
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115 | }, { |
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116 | .name = "tl-wr942n-v1:green:usb1", |
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117 | .gpio = TL_WR942N_V1_GPIO_LED_USB1, |
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118 | .active_low = 1, |
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119 | }, { |
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120 | .name = "tl-wr942n-v1:green:usb2", |
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121 | .gpio = TL_WR942N_V1_GPIO_LED_USB2, |
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122 | .active_low = 1, |
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123 | }, |
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124 | }; |
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125 | |||
126 | static struct gpio_keys_button tl_wr942n_v1_gpio_keys[] __initdata = { |
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127 | { |
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128 | .desc = "Reset button", |
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129 | .type = EV_KEY, |
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130 | .code = KEY_RESTART, |
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131 | .debounce_interval = TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL, |
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132 | .gpio = TL_WR942N_V1_GPIO_BTN_RESET, |
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133 | .active_low = 1, |
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134 | }, { |
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135 | .desc = "RFKILL button", |
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136 | .type = EV_KEY, |
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137 | .code = KEY_RFKILL, |
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138 | .debounce_interval = TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL, |
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139 | .gpio = TL_WR942N_V1_GPIO_BTN_RFKILL, |
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140 | .active_low = 1, |
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141 | }, |
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142 | }; |
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143 | |||
144 | static struct spi_gpio_platform_data tl_wr942n_v1_spi_data = { |
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145 | .sck = TL_WR942N_V1_GPIO_SHIFT_SRCLK, |
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146 | .miso = SPI_GPIO_NO_MISO, |
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147 | .mosi = TL_WR942N_V1_GPIO_SHIFT_SER, |
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148 | .num_chipselect = 1, |
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149 | }; |
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150 | |||
151 | static u8 tl_wr942n_v1_ssr_initdata[] = { |
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152 | BIT(TL_WR942N_V1_SSR_BIT_7) | |
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153 | BIT(TL_WR942N_V1_SSR_BIT_6) | |
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154 | BIT(TL_WR942N_V1_SSR_BIT_5) | |
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155 | BIT(TL_WR942N_V1_SSR_BIT_4) | |
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156 | BIT(TL_WR942N_V1_SSR_BIT_3) | |
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157 | BIT(TL_WR942N_V1_SSR_BIT_2) | |
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158 | BIT(TL_WR942N_V1_SSR_BIT_1) | |
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159 | BIT(TL_WR942N_V1_SSR_BIT_0) |
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160 | }; |
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161 | |||
162 | static struct gen_74x164_chip_platform_data tl_wr942n_v1_ssr_data = { |
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163 | .base = TL_WR942N_V1_74HC_GPIO_BASE, |
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164 | .num_registers = ARRAY_SIZE(tl_wr942n_v1_ssr_initdata), |
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165 | .init_data = tl_wr942n_v1_ssr_initdata, |
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166 | }; |
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167 | |||
168 | static struct platform_device tl_wr942n_v1_spi_device = { |
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169 | .name = "spi_gpio", |
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170 | .id = 1, |
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171 | .dev = { |
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172 | .platform_data = &tl_wr942n_v1_spi_data, |
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173 | }, |
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174 | }; |
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175 | |||
176 | static struct spi_board_info tl_wr942n_v1_spi_info[] = { |
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177 | { |
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178 | .bus_num = 1, |
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179 | .chip_select = 0, |
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180 | .max_speed_hz = 10000000, |
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181 | .modalias = "74x164", |
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182 | .platform_data = &tl_wr942n_v1_ssr_data, |
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183 | .controller_data = (void *) TL_WR942N_V1_GPIO_SHIFT_RCLK, |
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184 | }, |
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185 | }; |
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186 | |||
187 | static void tl_wr942n_v1_get_mac(const char *name, char *mac) |
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188 | { |
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189 | u8 *nvram = (u8 *) KSEG1ADDR(TL_WR942N_V1_DEFAULT_MAC_ADDR); |
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190 | int err; |
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191 | |||
192 | err = ath79_nvram_parse_mac_addr(nvram, TL_WR942N_V1_DEFAULT_MAC_SIZE, |
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193 | name, mac); |
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194 | |||
195 | if (err) |
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196 | pr_err("no MAC address found for %s\n", name); |
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197 | } |
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198 | |||
199 | static void __init tl_wr942n_v1_setup(void) |
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200 | { |
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201 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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202 | u8 tmpmac[ETH_ALEN]; |
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203 | void __iomem *base; |
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204 | u32 t; |
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205 | |||
206 | ath79_register_m25p80(NULL); |
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207 | |||
208 | spi_register_board_info(tl_wr942n_v1_spi_info, |
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209 | ARRAY_SIZE(tl_wr942n_v1_spi_info)); |
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210 | platform_device_register(&tl_wr942n_v1_spi_device); |
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211 | |||
212 | /* Check inherited UART RX GPIO definition */ |
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213 | base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); |
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214 | |||
215 | t = __raw_readl(base + QCA956X_GPIO_REG_IN_ENABLE0); |
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216 | if (((t & GPIO_IN_ENABLE0_UART_SIN_MASK) |
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217 | >> GPIO_IN_ENABLE0_UART_SIN_LSB) == TL_WR942N_V1_GPIO_LED_USB1) { |
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218 | pr_warn("Active UART detected on USBLED's GPIOs!\n"); |
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219 | |||
220 | tl_wr942n_v1_leds_gpio[9].gpio = TL_WR942N_V1_GPIO_UART_TX; |
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221 | tl_wr942n_v1_leds_gpio[10].gpio = TL_WR942N_V1_GPIO_UART_RX; |
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222 | } |
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223 | |||
224 | ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr942n_v1_leds_gpio), |
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225 | tl_wr942n_v1_leds_gpio); |
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226 | |||
227 | ath79_register_gpio_keys_polled(-1, TL_WR942N_V1_KEYS_POLL_INTERVAL, |
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228 | ARRAY_SIZE(tl_wr942n_v1_gpio_keys), |
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229 | tl_wr942n_v1_gpio_keys); |
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230 | |||
231 | tl_wr942n_v1_get_mac("MAC:", tmpmac); |
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232 | |||
233 | /* swap PHYs */ |
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234 | ath79_setup_qca956x_eth_cfg(QCA956X_ETH_CFG_SW_PHY_SWAP | |
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235 | QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP); |
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236 | |||
237 | ath79_register_mdio(0, 0x0); |
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238 | ath79_register_mdio(1, 0x0); |
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239 | |||
240 | /* WAN port */ |
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241 | ath79_init_mac(ath79_eth0_data.mac_addr, tmpmac, 1); |
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242 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
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243 | ath79_eth0_data.speed = SPEED_100; |
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244 | ath79_eth0_data.duplex = DUPLEX_FULL; |
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245 | |||
246 | /* swaped PHYs */ |
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247 | ath79_eth0_data.phy_mask = BIT(0); |
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248 | ath79_register_eth(0); |
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249 | |||
250 | /* LAN ports */ |
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251 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; |
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252 | ath79_init_mac(ath79_eth1_data.mac_addr, tmpmac, 0); |
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253 | ath79_eth1_data.speed = SPEED_1000; |
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254 | ath79_eth1_data.duplex = DUPLEX_FULL; |
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255 | |||
256 | /* swaped PHYs */ |
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257 | ath79_switch_data.phy_poll_mask |= BIT(0); |
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258 | ath79_switch_data.phy4_mii_en = 1; |
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259 | ath79_register_eth(1); |
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260 | |||
261 | ath79_register_wmac(art + TL_WR942N_V1_WMAC_CALDATA_OFFSET, tmpmac); |
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262 | |||
263 | ath79_register_usb(); |
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264 | |||
265 | gpio_request_one(TL_WR942N_V1_74HC_GPIO_HUB_RESET, |
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266 | GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
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267 | "USB power"); |
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268 | |||
269 | gpio_request_one(TL_WR942N_V1_GPIO_SHIFT_OE, |
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270 | GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, |
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271 | "LED control"); |
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272 | |||
273 | gpio_request_one(TL_WR942N_V1_GPIO_SHIFT_SRCLR, |
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274 | GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
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275 | "LED reset"); |
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276 | } |
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277 | |||
278 | MIPS_MACHINE(ATH79_MACH_TL_WR942N_V1, "TL-WR942N-V1", "TP-LINK TL-WR942N v1", |
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279 | tl_wr942n_v1_setup); |