OpenWrt – Blame information for rev 4

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4 office 1 /*
2 * MR1750 board support
3 *
4 * Copyright (c) 2012 Qualcomm Atheros
5 * Copyright (c) 2012-2013 Marek Lindner <marek@open-mesh.com>
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 */
20  
21 #include <linux/platform_device.h>
22 #include <linux/ar8216_platform.h>
23  
24 #include <asm/mach-ath79/ar71xx_regs.h>
25 #include <linux/platform_data/phy-at803x.h>
26  
27 #include "common.h"
28 #include "dev-ap9x-pci.h"
29 #include "dev-gpio-buttons.h"
30 #include "dev-eth.h"
31 #include "dev-leds-gpio.h"
32 #include "dev-m25p80.h"
33 #include "dev-wmac.h"
34 #include "machtypes.h"
35 #include "pci.h"
36  
37 #define MR1750_GPIO_LED_LAN 12
38 #define MR1750_GPIO_LED_WLAN_2G 13
39 #define MR1750_GPIO_LED_STATUS_GREEN 19
40 #define MR1750_GPIO_LED_STATUS_RED 21
41 #define MR1750_GPIO_LED_POWER 22
42 #define MR1750_GPIO_LED_WLAN_5G 23
43  
44 #define MR1750_GPIO_BTN_RESET 17
45  
46 #define MR1750_KEYS_POLL_INTERVAL 20 /* msecs */
47 #define MR1750_KEYS_DEBOUNCE_INTERVAL (3 * MR1750_KEYS_POLL_INTERVAL)
48  
49 #define MR1750_MAC0_OFFSET 0
50 #define MR1750_WMAC_CALDATA_OFFSET 0x1000
51  
52 static struct gpio_led mr1750_leds_gpio[] __initdata = {
53 {
54 .name = "mr1750:blue:power",
55 .gpio = MR1750_GPIO_LED_POWER,
56 .active_low = 1,
57 },
58 {
59 .name = "mr1750:blue:wan",
60 .gpio = MR1750_GPIO_LED_LAN,
61 .active_low = 1,
62 },
63 {
64 .name = "mr1750:blue:wlan24",
65 .gpio = MR1750_GPIO_LED_WLAN_2G,
66 .active_low = 1,
67 },
68 {
69 .name = "mr1750:blue:wlan58",
70 .gpio = MR1750_GPIO_LED_WLAN_5G,
71 .active_low = 1,
72 },
73 {
74 .name = "mr1750:green:status",
75 .gpio = MR1750_GPIO_LED_STATUS_GREEN,
76 .active_low = 1,
77 },
78 {
79 .name = "mr1750:red:status",
80 .gpio = MR1750_GPIO_LED_STATUS_RED,
81 .active_low = 1,
82 },
83 };
84  
85 static struct gpio_keys_button mr1750_gpio_keys[] __initdata = {
86 {
87 .desc = "Reset button",
88 .type = EV_KEY,
89 .code = KEY_RESTART,
90 .debounce_interval = MR1750_KEYS_DEBOUNCE_INTERVAL,
91 .gpio = MR1750_GPIO_BTN_RESET,
92 .active_low = 1,
93 },
94 };
95  
96 static struct at803x_platform_data mr1750_at803x_data = {
97 .disable_smarteee = 1,
98 .enable_rgmii_rx_delay = 1,
99 .enable_rgmii_tx_delay = 0,
100 .fixup_rgmii_tx_delay = 1,
101 };
102  
103 static struct mdio_board_info mr1750_mdio0_info[] = {
104 {
105 .bus_id = "ag71xx-mdio.0",
106 .phy_addr = 5,
107 .platform_data = &mr1750_at803x_data,
108 },
109 };
110  
111 static void __init mr1750_setup_qca955x_eth_cfg(u32 mask,
112 unsigned int rxd,
113 unsigned int rxdv,
114 unsigned int txd,
115 unsigned int txe)
116 {
117 void __iomem *base;
118 u32 t;
119  
120 base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
121  
122 t = mask;
123 t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
124 t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
125 t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
126 t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
127  
128 __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
129  
130 iounmap(base);
131 }
132  
133 static void __init mr1750_setup(void)
134 {
135 u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
136 u8 mac[6];
137  
138 ath79_eth0_pll_data.pll_1000 = 0xae000000;
139 ath79_eth0_pll_data.pll_100 = 0xa0000101;
140 ath79_eth0_pll_data.pll_10 = 0xa0001313;
141  
142 ath79_register_m25p80(NULL);
143  
144 ath79_register_leds_gpio(-1, ARRAY_SIZE(mr1750_leds_gpio),
145 mr1750_leds_gpio);
146 ath79_register_gpio_keys_polled(-1, MR1750_KEYS_POLL_INTERVAL,
147 ARRAY_SIZE(mr1750_gpio_keys),
148 mr1750_gpio_keys);
149  
150 ath79_init_mac(mac, art + MR1750_MAC0_OFFSET, 1);
151 ath79_register_wmac(art + MR1750_WMAC_CALDATA_OFFSET, mac);
152 ath79_register_pci();
153  
154 mr1750_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
155 ath79_register_mdio(0, 0x0);
156  
157 mdiobus_register_board_info(mr1750_mdio0_info,
158 ARRAY_SIZE(mr1750_mdio0_info));
159  
160 ath79_init_mac(ath79_eth0_data.mac_addr, art + MR1750_MAC0_OFFSET, 0);
161  
162 /* GMAC0 is connected to the RMGII interface */
163 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
164 ath79_eth0_data.phy_mask = BIT(5);
165 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
166  
167 ath79_register_eth(0);
168 }
169  
170 MIPS_MACHINE(ATH79_MACH_MR1750, "MR1750", "OpenMesh MR1750", mr1750_setup);
171 MIPS_MACHINE(ATH79_MACH_MR1750V2, "MR1750v2", "OpenMesh MR1750v2", mr1750_setup);