OpenWrt – Blame information for rev 4

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4 office 1 /*
2 * GL.iNet GL-MIFI-V3 board support
3 *
4 * Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10  
11 #include <linux/gpio.h>
12 #include <linux/i2c.h>
13 #include <linux/i2c-gpio.h>
14 #include <linux/platform_device.h>
15  
16 #include <asm/mach-ath79/ath79.h>
17 #include <asm/mach-ath79/ar71xx_regs.h>
18  
19 #include "common.h"
20 #include "dev-ap9x-pci.h"
21 #include "dev-eth.h"
22 #include "dev-gpio-buttons.h"
23 #include "dev-leds-gpio.h"
24 #include "dev-spi.h"
25 #include "dev-usb.h"
26 #include "dev-wmac.h"
27 #include "machtypes.h"
28  
29 #define GL_MIFI_V3_GPIO_BTN_RESET 3
30  
31 #define GL_MIFI_V3_KEYS_POLL_INTERVAL 20
32 #define GL_MIFI_V3_KEYS_DEBOUNCE_INTERVAL (3 * GL_MIFI_V3_KEYS_POLL_INTERVAL)
33  
34 #define GL_MIFI_V3_MAC0_OFFSET 0
35 #define GL_MIFI_V3_WMAC2G_CALDATA_OFFSET 0x1000
36 #define GL_MIFI_V3_WMAC5G_CALDATA_OFFSET 0x5000
37  
38 static struct gpio_keys_button gl_mifi_v3_gpio_keys[] __initdata = {
39 {
40 .desc = "reset",
41 .type = EV_KEY,
42 .code = KEY_RESTART,
43 .debounce_interval = GL_MIFI_V3_KEYS_DEBOUNCE_INTERVAL,
44 .gpio = GL_MIFI_V3_GPIO_BTN_RESET,
45 .active_low = 1,
46 },
47 };
48  
49 static struct spi_board_info gl_mifi_v3_spi_info[] = {
50 {
51 .bus_num = 0,
52 .chip_select = 0,
53 .max_speed_hz = 25000000,
54 .modalias = "m25p80",
55 .platform_data = NULL,
56 },
57 {
58 .bus_num = 0,
59 .chip_select = 1,
60 .max_speed_hz = 25000000,
61 .modalias = "generic-spinand-controller",
62 .platform_data = NULL,
63 }
64 };
65  
66 static struct ath79_spi_platform_data gl_mifi_v3_spi_data = {
67 .bus_num = 0,
68 .num_chipselect = 2,
69 };
70  
71 static void __init gl_mifi_v3_setup(void)
72 {
73 u8 *art = (u8 *) KSEG1ADDR(0x1f050000);
74  
75 ath79_register_spi(&gl_mifi_v3_spi_data, gl_mifi_v3_spi_info, 2);
76  
77 ath79_register_mdio(0, 0x0);
78  
79 ath79_switch_data.phy4_mii_en = 1;
80 ath79_switch_data.phy_poll_mask |= BIT(4);
81  
82 /* WAN */
83 ath79_eth0_data.duplex = DUPLEX_FULL;
84 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
85 ath79_eth0_data.phy_mask = BIT(4);
86 ath79_eth0_data.speed = SPEED_100;
87 ath79_init_mac(ath79_eth0_data.mac_addr, art + GL_MIFI_V3_MAC0_OFFSET, 0);
88 ath79_register_eth(0);
89  
90 /* Disable JTAG (enables GPIO0-3) */
91 ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
92  
93 ath79_register_gpio_keys_polled(-1, GL_MIFI_V3_KEYS_POLL_INTERVAL,
94 ARRAY_SIZE(gl_mifi_v3_gpio_keys),
95 gl_mifi_v3_gpio_keys);
96  
97 ath79_register_usb();
98  
99 ath79_register_wmac(art + GL_MIFI_V3_WMAC2G_CALDATA_OFFSET, NULL);
100  
101 ap91_pci_init(art + GL_MIFI_V3_WMAC5G_CALDATA_OFFSET, NULL);
102 }
103  
104 MIPS_MACHINE(ATH79_MACH_GL_MIFI_V3, "GL-MIFI-V3", "GL.iNet GL-MIFI-V3",
105 gl_mifi_v3_setup);