OpenWrt – Blame information for rev 4

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4 office 1 /*
2 * DomyWifi DW33D support
3 *
4 * Copyright (c) 2012 Qualcomm Atheros
5 * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 */
20  
21 #include <linux/platform_device.h>
22 #include <linux/ar8216_platform.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/nand.h>
25 #include <linux/platform/ar934x_nfc.h>
26  
27 #include <asm/mach-ath79/ar71xx_regs.h>
28  
29 #include "common.h"
30 #include "pci.h"
31 #include "dev-ap9x-pci.h"
32 #include "dev-gpio-buttons.h"
33 #include "dev-eth.h"
34 #include "dev-leds-gpio.h"
35 #include "dev-m25p80.h"
36 #include "dev-nfc.h"
37 #include "dev-usb.h"
38 #include "dev-wmac.h"
39 #include "machtypes.h"
40  
41 #define DW33D_GPIO_LED_MMC 4
42 #define DW33D_GPIO_LED_WLAN_2G 13
43 #define DW33D_GPIO_LED_STATUS 14
44 #define DW33D_GPIO_LED_USB 15
45 #define DW33D_GPIO_LED_INTERNET 22
46  
47 #define DW33D_GPIO_BTN_RESET 17
48  
49 #define DW33D_KEYS_POLL_INTERVAL 20 /* msecs */
50 #define DW33D_KEYS_DEBOUNCE_INTERVAL (3 * DW33D_KEYS_POLL_INTERVAL)
51  
52 #define DW33D_MAC0_OFFSET 0
53 #define DW33D_MAC1_OFFSET 6
54 #define DW33D_WMAC_OFFSET 12
55 #define DW33D_WMAC_CALDATA_OFFSET 0x1000
56 #define DW33D_PCIE_CALDATA_OFFSET 0x5000
57  
58 static struct gpio_led dw33d_leds_gpio[] __initdata = {
59 {
60 .name = "dw33d:blue:status",
61 .gpio = DW33D_GPIO_LED_STATUS,
62 .active_low = 1,
63 },
64 {
65 .name = "dw33d:blue:mmc",
66 .gpio = DW33D_GPIO_LED_MMC,
67 .active_low = 1,
68 },
69 {
70 .name = "dw33d:blue:usb",
71 .gpio = DW33D_GPIO_LED_USB,
72 .active_low = 1,
73 },
74 {
75 .name = "dw33d:blue:wlan-2g",
76 .gpio = DW33D_GPIO_LED_WLAN_2G,
77 .active_low = 1,
78 },
79 {
80 .name = "dw33d:blue:internet",
81 .gpio = DW33D_GPIO_LED_INTERNET,
82 .active_low = 1,
83 }
84 };
85  
86 static struct gpio_keys_button dw33d_gpio_keys[] __initdata = {
87 {
88 .desc = "Reset button",
89 .type = EV_KEY,
90 .code = KEY_RESTART,
91 .debounce_interval = DW33D_KEYS_DEBOUNCE_INTERVAL,
92 .gpio = DW33D_GPIO_BTN_RESET,
93 .active_low = 1,
94 }
95 };
96  
97 /* GMAC6 of the QCA8337 switch is connected to the QCA9558 SoC via SGMII */
98 static struct ar8327_pad_cfg dw33d_qca8337_pad6_cfg = {
99 .mode = AR8327_PAD_MAC_SGMII,
100 .sgmii_delay_en = true,
101 };
102  
103 /* GMAC0 of the QCA8337 switch is connected to the QCA9558 SoC via RGMII */
104 static struct ar8327_pad_cfg dw33d_qca8337_pad0_cfg = {
105 .mode = AR8327_PAD_MAC_RGMII,
106 .txclk_delay_en = true,
107 .rxclk_delay_en = true,
108 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
109 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
110 };
111  
112 static struct ar8327_platform_data dw33d_qca8337_data = {
113 .pad0_cfg = &dw33d_qca8337_pad0_cfg,
114 .pad6_cfg = &dw33d_qca8337_pad6_cfg,
115 .port0_cfg = {
116 .force_link = 1,
117 .speed = AR8327_PORT_SPEED_1000,
118 .duplex = 1,
119 .txpause = 1,
120 .rxpause = 1,
121 },
122 .port6_cfg = {
123 .force_link = 1,
124 .speed = AR8327_PORT_SPEED_1000,
125 .duplex = 1,
126 .txpause = 1,
127 .rxpause = 1,
128 },
129 };
130  
131 static struct mdio_board_info dw33d_mdio0_info[] = {
132 {
133 .bus_id = "ag71xx-mdio.0",
134 .phy_addr = 0,
135 .platform_data = &dw33d_qca8337_data,
136 },
137 };
138  
139 static void __init dw33d_setup(void)
140 {
141 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
142  
143 ath79_register_m25p80(NULL);
144  
145 ath79_register_leds_gpio(-1, ARRAY_SIZE(dw33d_leds_gpio),
146 dw33d_leds_gpio);
147 ath79_register_gpio_keys_polled(-1, DW33D_KEYS_POLL_INTERVAL,
148 ARRAY_SIZE(dw33d_gpio_keys),
149 dw33d_gpio_keys);
150  
151 ath79_register_usb();
152 ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW);
153 ath79_register_nfc();
154 ath79_register_pci();
155  
156 ath79_register_wmac(art + DW33D_WMAC_CALDATA_OFFSET, art + DW33D_WMAC_OFFSET);
157  
158 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
159  
160 ath79_register_mdio(0, 0x0);
161  
162 ath79_init_mac(ath79_eth0_data.mac_addr, art + DW33D_MAC0_OFFSET, 0);
163 ath79_init_mac(ath79_eth1_data.mac_addr, art + DW33D_MAC1_OFFSET, 0);
164  
165 mdiobus_register_board_info(dw33d_mdio0_info,
166 ARRAY_SIZE(dw33d_mdio0_info));
167  
168 /* GMAC0 is connected to the RMGII interface */
169 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
170 ath79_eth0_data.phy_mask = BIT(0);
171 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
172 ath79_eth0_pll_data.pll_1000 = 0x56000000;
173  
174 ath79_register_eth(0);
175  
176 /* GMAC1 is connected tot eh SGMII interface */
177 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
178 ath79_eth1_data.speed = SPEED_1000;
179 ath79_eth1_data.duplex = DUPLEX_FULL;
180 ath79_eth1_pll_data.pll_1000 = 0x03000101;
181  
182 ath79_register_eth(1);
183 }
184  
185 MIPS_MACHINE(ATH79_MACH_DOMYWIFI_DW33D, "DW33D",
186 "DomyWifi DW33D",
187 dw33d_setup);