OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | /* |
2 | * Atheros AR71xx SoC device definitions |
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3 | * |
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4 | * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> |
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5 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
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6 | * |
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7 | * This program is free software; you can redistribute it and/or modify it |
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8 | * under the terms of the GNU General Public License version 2 as published |
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9 | * by the Free Software Foundation. |
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10 | */ |
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11 | |||
12 | #ifndef _ATH79_DEV_ETH_H |
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13 | #define _ATH79_DEV_ETH_H |
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14 | |||
15 | #include <asm/mach-ath79/ag71xx_platform.h> |
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16 | |||
17 | struct platform_device; |
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18 | |||
19 | extern unsigned char ath79_mac_base[] __initdata; |
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20 | void ath79_parse_ascii_mac(char *mac_str, u8 *mac); |
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21 | void ath79_extract_mac_reverse(u8 *ptr, u8 *out); |
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22 | void ath79_init_mac(unsigned char *dst, const unsigned char *src, |
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23 | int offset); |
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24 | void ath79_init_local_mac(unsigned char *dst, const unsigned char *src); |
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25 | |||
26 | struct ath79_eth_pll_data { |
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27 | u32 pll_10; |
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28 | u32 pll_100; |
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29 | u32 pll_1000; |
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30 | }; |
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31 | |||
32 | extern struct ath79_eth_pll_data ath79_eth0_pll_data; |
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33 | extern struct ath79_eth_pll_data ath79_eth1_pll_data; |
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34 | |||
35 | extern struct ag71xx_platform_data ath79_eth0_data; |
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36 | extern struct ag71xx_platform_data ath79_eth1_data; |
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37 | extern struct platform_device ath79_eth0_device; |
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38 | extern struct platform_device ath79_eth1_device; |
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39 | void ath79_register_eth(unsigned int id); |
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40 | |||
41 | extern struct ag71xx_switch_platform_data ath79_switch_data; |
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42 | |||
43 | extern struct ag71xx_mdio_platform_data ath79_mdio0_data; |
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44 | extern struct ag71xx_mdio_platform_data ath79_mdio1_data; |
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45 | extern struct platform_device ath79_mdio0_device; |
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46 | extern struct platform_device ath79_mdio1_device; |
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47 | void ath79_register_mdio(unsigned int id, u32 phy_mask); |
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48 | |||
49 | void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio); |
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50 | void ath79_setup_ar934x_eth_cfg(u32 mask); |
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51 | void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); |
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52 | void ath79_setup_qca955x_eth_cfg(u32 mask); |
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53 | void ath79_setup_qca956x_eth_cfg(u32 mask); |
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54 | |||
55 | #endif /* _ATH79_DEV_ETH_H */ |