OpenWrt – Blame information for rev 4

Subversion Repositories:
Rev:
Rev Author Line No. Line
4 office 1 --- a/src/drv_mei_cpe_common.c
2 +++ b/src/drv_mei_cpe_common.c
3 @@ -19,7 +19,6 @@
4 /* get at first the driver configuration */
5 #include "drv_mei_cpe_config.h"
6  
7 -#include "ifx_types.h"
8 #include "drv_mei_cpe_os.h"
9 #include "drv_mei_cpe_dbg.h"
10  
11 --- a/src/drv_mei_cpe_linux.h
12 +++ b/src/drv_mei_cpe_linux.h
13 @@ -60,12 +60,6 @@
14 #include <linux/poll.h>
15 #include <linux/types.h>
16  
17 -#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
18 - #include <asm/ifx/ifx_types.h>
19 -#else
20 - #include <ifx_types.h>
21 -#endif
22 -
23 #endif /* #if (MEI_DRV_IFXOS_ENABLE == 0)*/
24  
25 #include <linux/dma-mapping.h>
26 --- a/src/drv_mei_cpe_linux.c
27 +++ b/src/drv_mei_cpe_linux.c
28 @@ -114,6 +114,8 @@
29  
30 #include "drv_mei_cpe_api_atm_ptm_intern.h"
31  
32 +#include <lantiq_soc.h>
33 +
34 /* ===================================
35 extern function declarations
36 =================================== */
37 @@ -220,6 +222,8 @@ static void MEI_NlSendMsg(IFX_char_t* pM
38 /* Local variables (LINUX) */
39 /* =================================== */
40 static IFX_uint8_t major_number = 0;
41 +static struct class *mei_class;
42 +static dev_t mei_devt;
43 #ifdef MODULE
44 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
45 MODULE_PARM(major_number, "b");
46 @@ -2174,9 +2178,11 @@ static int MEI_module_init (void)
47 return (result);
48 }
49  
50 +#if 0
51 #if (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
52 ppa_callback_set(LTQ_MEI_SHOWTIME_CHECK, (void *)ltq_mei_showtime_check);
53 #endif /* #if (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1) */
54 +#endif
55  
56 return 0;
57 }
58 @@ -2304,6 +2310,10 @@ static void MEI_module_exit (void)
59  
60 #else
61 unregister_chrdev ( major_number , DRV_MEI_NAME );
62 + device_destroy(mei_class, mei_devt);
63 + mei_devt = 0;
64 + class_destroy(mei_class);
65 + mei_class = NULL;
66 #endif
67  
68 #if CONFIG_PROC_FS
69 @@ -2388,9 +2398,11 @@ static void MEI_module_exit (void)
70 ("MEI_DRV: Chipset Basic Exit failed" MEI_DRV_CRLF));
71 }
72  
73 +#if 0
74 #if (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
75 ppa_callback_set(LTQ_MEI_SHOWTIME_CHECK, (void *)NULL);
76 #endif /* #if (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1) */
77 +#endif
78  
79 #if (MEI_SUPPORT_DEBUG_LOGGER == 1)
80 if (nl_debug_sock)
81 @@ -2514,6 +2526,10 @@ static int MEI_InitModuleRegCharDev(cons
82 ("Using major number %d" MEI_DRV_CRLF, major_number));
83 }
84  
85 + mei_class = class_create(THIS_MODULE, devName);
86 + mei_devt = MKDEV(major_number, 0);
87 + device_create(mei_class, NULL, mei_devt, NULL, "%s/%i", devName, 0);
88 +
89 return 0;
90 #endif /* CONFIG_DEVFS_FS */
91 }
92 @@ -2563,21 +2579,32 @@ static int MEI_InitModuleBasics(void)
93 }
94  
95 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0))
96 +
97 +#define PMU_DFE BIT(9)
98 +
99 static int MEI_SysClkEnable(struct clk *clk)
100 {
101 +#if 0
102 if (IS_ERR(clk))
103 return -1;
104 clk_enable(clk);
105 +#else
106 + ltq_pmu_enable(PMU_DFE);
107 +#endif
108  
109 return 0;
110 }
111  
112 static int MEI_SysClkDisable(struct clk *clk)
113 {
114 +#if 0
115 if (IS_ERR(clk))
116 return -1;
117 clk_disable(clk);
118 clk_put(clk);
119 +#else
120 + ltq_pmu_disable(PMU_DFE);
121 +#endif
122  
123 return 0;
124 }
125 @@ -2905,11 +2932,15 @@ IFX_int32_t MEI_IoctlInitDevice(
126 pMeiDev->eModePoll = e_MEI_DEV_ACCESS_MODE_IRQ;
127 pMeiDev->intMask = ME_ARC2ME_INTERRUPT_UNMASK_ALL;
128  
129 +#if 1
130 + virq = (IFX_uint32_t)pInitDev->usedIRQ;
131 +#else
132 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0))
133 virq = (IFX_uint32_t)pInitDev->usedIRQ;
134 #else
135 virq = irq_create_mapping(NULL, (IFX_uint32_t)pInitDev->usedIRQ);
136 #endif
137 +#endif
138  
139 pTmpXCntrl = MEI_VrxXDevToIrqListAdd(
140 MEI_DRV_LINENUM_GET(pMeiDev),
141 --- a/src/drv_mei_cpe_api_atm_ptm_intern.c
142 +++ b/src/drv_mei_cpe_api_atm_ptm_intern.c
143 @@ -147,6 +147,7 @@ IFX_int32_t MEI_InternalXtmSwhowtimeExit
144 return retVal;
145 }
146  
147 +#if 0
148 IFX_int32_t MEI_InternalTcRequest(
149 MEI_DYN_CNTRL_T *pMeiDynCntrl,
150 MEI_TC_Request_t *pArgTcRequest)
151 @@ -232,6 +233,7 @@ IFX_int32_t MEI_InternalTcReset(
152  
153 return retVal;
154 }
155 +#endif
156  
157 /**
158 Function that is used by the PP subsystem to get some showtime relevant data
159 @@ -311,10 +313,57 @@ int ifx_mei_atm_led_blink(void)
160 return IFX_SUCCESS;
161 }
162  
163 +#if MEI_MAX_DFE_CHAN_DEVICES > 1
164 +#error "Compat functions do not support MEI_MAX_DFE_CHAN_DEVICES > 1 yet"
165 +#else
166 +int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL;
167 +int (*ifx_mei_atm_showtime_exit)(void) = NULL;
168 +
169 +int ltq_ifx_mei_atm_showtime_enter_compat(IFX_uint8_t dslLineNum,
170 + struct port_cell_info *cellInfo,
171 + void *xdata) {
172 + if (ifx_mei_atm_showtime_enter)
173 + return ifx_mei_atm_showtime_enter(cellInfo, xdata);
174 +
175 + return -e_MEI_ERR_OP_FAILED;
176 +}
177 +
178 +int ltq_ifx_mei_atm_showtime_exit_compat(IFX_uint8_t dslLineNum) {
179 + if (ifx_mei_atm_showtime_exit)
180 + return ifx_mei_atm_showtime_exit();
181 +
182 + return -e_MEI_ERR_OP_FAILED;
183 +}
184 +
185 +void* ppa_callback_get(e_ltq_mei_cb_type type) {
186 + switch (type) {
187 + case LTQ_MEI_SHOWTIME_ENTER:
188 + return &ltq_ifx_mei_atm_showtime_enter_compat;
189 + case LTQ_MEI_SHOWTIME_EXIT:
190 + return &ltq_ifx_mei_atm_showtime_exit_compat;
191 + break;
192 + }
193 +
194 + BUG();
195 +}
196 +
197 +int ifx_mei_atm_showtime_check(int *is_showtime,
198 + struct port_cell_info *port_cell,
199 + void **xdata_addr) {
200 + return ltq_mei_showtime_check(0, is_showtime, port_cell, xdata_addr);
201 +}
202 +
203 +EXPORT_SYMBOL(ifx_mei_atm_showtime_enter);
204 +EXPORT_SYMBOL(ifx_mei_atm_showtime_exit);
205 +EXPORT_SYMBOL(ifx_mei_atm_showtime_check);
206 +#endif
207 +
208 EXPORT_SYMBOL (MEI_InternalXtmSwhowtimeEntrySignal);
209 EXPORT_SYMBOL (MEI_InternalXtmSwhowtimeExitSignal);
210 +#if 0
211 EXPORT_SYMBOL (MEI_InternalTcRequest);
212 EXPORT_SYMBOL (MEI_InternalTcReset);
213 +#endif
214 EXPORT_SYMBOL(ifx_mei_atm_led_blink);
215  
216 #endif /* #if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1) */
217 --- a/src/drv_mei_cpe_api_atm_ptm_intern.h
218 +++ b/src/drv_mei_cpe_api_atm_ptm_intern.h
219 @@ -21,7 +21,6 @@
220  
221 #include "drv_mei_cpe_config.h"
222 #include "drv_mei_cpe_interface.h"
223 -#include <net/ppa_stack_al.h>
224  
225 #if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
226  
227 @@ -59,8 +58,21 @@ extern IFX_int32_t MEI_InternalTcReset(
228 MEI_DYN_CNTRL_T *pMeiDynCntrl,
229 MEI_TC_Reset_t *pArgTcReset);
230  
231 +#if 1
232 +#include <lantiq_atm.h>
233 +typedef enum {
234 + LTQ_MEI_SHOWTIME_ENTER,
235 + LTQ_MEI_SHOWTIME_EXIT
236 +} e_ltq_mei_cb_type;
237 +
238 +typedef void (*ltq_mei_atm_showtime_enter_t)(IFX_uint8_t, struct port_cell_info *, void *);
239 +typedef void (*ltq_mei_atm_showtime_exit_t)(IFX_uint8_t);
240 +
241 +void* ppa_callback_get(e_ltq_mei_cb_type type);
242 +#else
243 extern int ppa_callback_set(e_ltq_mei_cb_type type, void *func);
244 extern void* ppa_callback_get(e_ltq_mei_cb_type type);
245 +#endif
246  
247 int ltq_mei_showtime_check(
248 const unsigned char line_idx,
249 --- a/src/drv_mei_cpe_device_vrx.c
250 +++ b/src/drv_mei_cpe_device_vrx.c
251 @@ -28,17 +28,6 @@
252 #include "drv_mei_cpe_api.h"
253 #include "drv_mei_cpe_mei_vrx.h"
254  
255 -#if defined(LINUX)
256 -# if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
257 -# if (MEI_SUPPORT_DEVICE_VR10_320 != 1)
258 -# include "ifx_pcie.h"
259 -# else
260 -# include "../drivers/net/ethernet/lantiq/lantiq_pcie.h"
261 -# endif
262 -# else
263 -# include "lantiq_pcie.h"
264 -# endif
265 -#endif /* #if defined(LINUX)*/
266  
267 IFX_int32_t MEI_GPIntProcess(MEI_MeiRegVal_t processInt, MEI_DEV_T *pMeiDev)
268 {
269 @@ -86,6 +75,7 @@ IFX_int32_t MEI_GetChipInfo(MEI_DEV_T *p
270 */
271 IFX_int32_t MEI_VR10_PcieEntitiesCheck(IFX_uint8_t nEntityNum)
272 {
273 +#if 0
274 IFX_uint32_t pcie_entitiesNum;
275  
276 /* get information from pcie driver */
277 @@ -110,6 +100,9 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
278 }
279  
280 return IFX_SUCCESS;
281 +#else
282 + return IFX_ERROR;
283 +#endif
284 }
285  
286 /**
287 @@ -124,6 +117,7 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
288 */
289 IFX_int32_t MEI_VR10_PcieEntityInit(MEI_MEI_DRV_CNTRL_T *pMeiDrvCntrl)
290 {
291 +#if 0
292 IFX_uint8_t entityNum;
293 #if (MEI_SUPPORT_DEVICE_VR10_320 != 1)
294 ifx_pcie_ep_dev_t MEI_pcie_ep_dev;
295 @@ -156,6 +150,9 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
296 pMeiDrvCntrl->MEI_pcie_irq = 99;
297  
298 return IFX_SUCCESS;
299 +#else
300 + return IFX_ERROR;
301 +#endif
302 }
303  
304 /**
305 @@ -170,6 +167,7 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
306 */
307 IFX_int32_t MEI_VR10_PcieEntityFree(IFX_uint8_t entityNum)
308 {
309 +#if 0
310 #if (MEI_SUPPORT_DEVICE_VR10_320 != 1)
311 if (ifx_pcie_ep_dev_info_release(entityNum))
312 #else
313 @@ -183,6 +181,9 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
314 }
315  
316 return IFX_SUCCESS;
317 +#else
318 + return IFX_ERROR;
319 +#endif
320 }
321  
322 /**
323 @@ -197,6 +198,7 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
324 */
325 IFX_int32_t MEI_VR10_InternalInitDevice(MEI_DYN_CNTRL_T *pMeiDynCntrl)
326 {
327 +#if 0
328 IFX_int32_t retVal;
329 IOCTL_MEI_devInit_t InitDev;
330 MEI_DEV_T *pMeiDev = pMeiDynCntrl->pMeiDev;
331 @@ -221,6 +223,9 @@ IFX_int32_t MEI_VR10_InternalInitDevice(
332 *MEI_GPIO_U32REG(GPIO_P0_ALSEL1) &= ~((1 << 0) | (1 << 3) | (1 << 8));
333  
334 return IFX_SUCCESS;
335 +#else
336 + return IFX_ERROR;
337 +#endif
338 }
339  
340 IFX_int32_t MEI_PLL_ConfigInit(MEI_DEV_T *pMeiDev)
341 --- a/src/drv_mei_cpe_dsm.c
342 +++ b/src/drv_mei_cpe_dsm.c
343 @@ -144,7 +144,7 @@ IFX_void_t MEI_VRX_DSM_DataInit(MEI_DEV_
344 memset((IFX_uint8_t *)&pMeiDev->firmwareFeatures, 0x00, sizeof(IOCTL_MEI_firmwareFeatures_t));
345 pMeiDev->meiFwDlCount = 0;
346  
347 - pMeiDev->meiERBbuf.pCallBackFunc = mei_dsm_cb_func_hook;
348 + pMeiDev->meiERBbuf.pCallBackFunc = NULL;
349  
350 PRN_DBG_USR_NL( MEI_DRV, MEI_DRV_PRN_LEVEL_NORMAL,
351 ("MEI_DRV: PP callback function addr = 0x%08X" MEI_DRV_CRLF,
352 --- a/src/drv_mei_cpe_download_vrx.c
353 +++ b/src/drv_mei_cpe_download_vrx.c
354 @@ -3281,12 +3281,14 @@ IFX_int32_t MEI_DEV_IoctlFirmwareDownloa
355 /* reset TC layer */
356 if (ret == 0)
357 {
358 +#if 0
359 if (MEI_InternalTcReset(pMeiDynCntrl, &tc_reset) != 0)
360 {
361 PRN_ERR_USR_NL( MEI_DRV, MEI_DRV_PRN_LEVEL_WRN,
362 ("MEI_DRV[%02d]: Could not perform reset of TC-Layer!"
363 MEI_DRV_CRLF, MEI_DRV_LINENUM_GET(pMeiDev)));
364 }
365 +#endif
366 }
367 #endif
368