OpenWrt – Blame information for rev 4

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4 office 1 From 77f54e8698001d8a987f2aa4870f71b65dc089eb Mon Sep 17 00:00:00 2001
2 In-Reply-To: <20170921152217.4011-1-antony@phenome.org>
3 References: <20170921152217.4011-1-antony@phenome.org>
4 From: Antony Antony <antony@phenome.org>
5 Date: Thu, 21 Sep 2017 13:34:07 +0200
6 Subject: [PATCH v5 1/2] sun50i: h5: Add NanoPi Neo Plus2 DT initial support
7  
8 Add initial DT for NanoPi NEO Plus2 by FriendlyARM
9 - Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
10 - 1 GB DDR3 RAM
11 - 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
12 - micro SD card slot
13 - Gigabit Ethernet (external RTL8211E-VB-CG chip)
14 - 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
15 - 2x USB 2.0 host ports
16  
17 Signed-off-by: Antony Antony <antony@phenome.org>
18 ---
19 arch/arm/dts/Makefile | 1 +
20 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 106 ++++++++++++++++++++++++++++
21 configs/nanopi_neo_plus2_defconfig | 18 +++++
22 3 files changed, 125 insertions(+)
23 create mode 100644 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
24 create mode 100644 configs/nanopi_neo_plus2_defconfig
25  
26 --- a/arch/arm/dts/Makefile
27 +++ b/arch/arm/dts/Makefile
28 @@ -337,6 +337,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
29 sun8i-v3s-licheepi-zero.dtb
30 dtb-$(CONFIG_MACH_SUN50I_H5) += \
31 sun50i-h5-nanopi-neo2.dtb \
32 + sun50i-h5-nanopi-neo-plus2.dtb \
33 sun50i-h5-orangepi-pc2.dtb \
34 sun50i-h5-orangepi-prime.dtb \
35 sun50i-h5-orangepi-zero-plus2.dtb
36 --- /dev/null
37 +++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
38 @@ -0,0 +1,106 @@
39 +/*
40 + * Copyright (C) 2017 Antony Antony <antony@phenome.org>
41 + * Copyright (c) 2016 ARM Ltd.
42 + *
43 + * This file is dual-licensed: you can use it either under the terms
44 + * of the GPL or the X11 license, at your option. Note that this dual
45 + * licensing only applies to this file, and not this project as a
46 + * whole.
47 + *
48 + * a) This library is free software; you can redistribute it and/or
49 + * modify it under the terms of the GNU General Public License as
50 + * published by the Free Software Foundation; either version 2 of the
51 + * License, or (at your option) any later version.
52 + *
53 + * This library is distributed in the hope that it will be useful,
54 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
55 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
56 + * GNU General Public License for more details.
57 + *
58 + * Or, alternatively,
59 + *
60 + * b) Permission is hereby granted, free of charge, to any person
61 + * obtaining a copy of this software and associated documentation
62 + * files (the "Software"), to deal in the Software without
63 + * restriction, including without limitation the rights to use,
64 + * copy, modify, merge, publish, distribute, sublicense, and/or
65 + * sell copies of the Software, and to permit persons to whom the
66 + * Software is furnished to do so, subject to the following
67 + * conditions:
68 + *
69 + * The above copyright notice and this permission notice shall be
70 + * included in all copies or substantial portions of the Software.
71 + *
72 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
73 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
74 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
75 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
76 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
77 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
78 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
79 + * OTHER DEALINGS IN THE SOFTWARE.
80 + */
81 +
82 +/dts-v1/;
83 +
84 +#include "sun50i-h5.dtsi"
85 +
86 +#include <dt-bindings/gpio/gpio.h>
87 +
88 +/ {
89 + model = "FriendlyARM NanoPi NEO Plus 2";
90 + compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
91 +
92 + aliases {
93 + serial0 = &uart0;
94 + };
95 +
96 + chosen {
97 + stdout-path = "serial0:115200n8";
98 + };
99 +
100 + reg_vcc3v3: vcc3v3 {
101 + compatible = "regulator-fixed";
102 + regulator-name = "vcc3v3";
103 + regulator-min-microvolt = <3300000>;
104 + regulator-max-microvolt = <3300000>;
105 + };
106 +};
107 +
108 +&ehci1 {
109 + status = "okay";
110 +};
111 +
112 +&mmc0 {
113 + pinctrl-names = "default";
114 + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
115 + vmmc-supply = <&reg_vcc3v3>;
116 + bus-width = <4>;
117 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
118 + cd-inverted;
119 + status = "okay";
120 +};
121 +
122 +&mmc2 {
123 + pinctrl-names = "default";
124 + pinctrl-0 = <&mmc2_8bit_pins>;
125 + vmmc-supply = <&reg_vcc3v3>;
126 + bus-width = <8>;
127 + non-removable;
128 + cap-mmc-hw-reset;
129 + status = "okay";
130 +};
131 +
132 +&ohci1 {
133 + status = "okay";
134 +};
135 +
136 +&uart0 {
137 + pinctrl-names = "default";
138 + pinctrl-0 = <&uart0_pins_a>;
139 + status = "okay";
140 +};
141 +
142 +&usbphy {
143 + status = "okay";
144 +};
145 --- /dev/null
146 +++ b/configs/nanopi_neo_plus2_defconfig
147 @@ -0,0 +1,18 @@
148 +CONFIG_ARM=y
149 +CONFIG_ARCH_SUNXI=y
150 +CONFIG_MACH_SUN50I_H5=y
151 +CONFIG_DRAM_CLK=408
152 +CONFIG_DRAM_ZQ=3881977
153 +CONFIG_MACPWR="PD6"
154 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2"
155 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
156 +CONFIG_SPL=y
157 +# CONFIG_CMD_IMLS is not set
158 +# CONFIG_CMD_FLASH is not set
159 +# CONFIG_CMD_FPGA is not set
160 +# CONFIG_SPL_DOS_PARTITION is not set
161 +# CONFIG_SPL_ISO_PARTITION is not set
162 +# CONFIG_SPL_EFI_PARTITION is not set
163 +CONFIG_SUN8I_EMAC=y
164 +CONFIG_USB_EHCI_HCD=y
165 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2