OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | /* |
2 | * Mikrotik's RouterBOOT configuration defines |
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3 | * |
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4 | * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License version 2 as published |
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8 | * by the Free Software Foundation. |
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9 | * |
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10 | */ |
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11 | |||
12 | #ifndef _RBCFG_H |
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13 | #define _RBCFG_H |
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14 | |||
15 | /* |
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16 | * Magic numbers |
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17 | */ |
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18 | #define RB_MAGIC_SOFT 0x74666f53 /* 'Soft' */ |
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19 | |||
20 | /* |
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21 | * ID values for Software settings |
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22 | */ |
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23 | #define RB_ID_TERMINATOR 0 |
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24 | #define RB_ID_UART_SPEED 1 |
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25 | #define RB_ID_BOOT_DELAY 2 |
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26 | #define RB_ID_BOOT_DEVICE 3 |
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27 | #define RB_ID_BOOT_KEY 4 |
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28 | #define RB_ID_CPU_MODE 5 |
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29 | #define RB_ID_FW_VERSION 6 |
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30 | #define RB_ID_SOFT_07 7 |
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31 | #define RB_ID_SOFT_08 8 |
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32 | #define RB_ID_BOOT_PROTOCOL 9 |
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33 | #define RB_ID_SOFT_10 10 |
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34 | #define RB_ID_SOFT_11 11 |
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35 | #define RB_ID_CPU_FREQ 12 |
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36 | #define RB_ID_BOOTER 13 |
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37 | |||
38 | #define RB_UART_SPEED_115200 0 |
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39 | #define RB_UART_SPEED_57600 1 |
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40 | #define RB_UART_SPEED_38400 2 |
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41 | #define RB_UART_SPEED_19200 3 |
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42 | #define RB_UART_SPEED_9600 4 |
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43 | #define RB_UART_SPEED_4800 5 |
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44 | #define RB_UART_SPEED_2400 6 |
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45 | #define RB_UART_SPEED_1200 7 |
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46 | #define RB_UART_SPEED_OFF 8 |
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47 | |||
48 | #define RB_BOOT_DELAY_1SEC 1 |
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49 | #define RB_BOOT_DELAY_2SEC 2 |
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50 | #define RB_BOOT_DELAY_3SEC 3 |
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51 | #define RB_BOOT_DELAY_4SEC 4 |
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52 | #define RB_BOOT_DELAY_5SEC 5 |
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53 | #define RB_BOOT_DELAY_6SEC 6 |
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54 | #define RB_BOOT_DELAY_7SEC 7 |
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55 | #define RB_BOOT_DELAY_8SEC 8 |
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56 | #define RB_BOOT_DELAY_9SEC 9 |
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57 | |||
58 | #define RB_BOOT_DEVICE_ETHER 0 |
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59 | #define RB_BOOT_DEVICE_NANDETH 1 |
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60 | #define RB_BOOT_DEVICE_CFCARD 2 |
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61 | #define RB_BOOT_DEVICE_ETHONCE 3 |
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62 | #define RB_BOOT_DEVICE_NANDONLY 5 |
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63 | #define RB_BOOT_DEVICE_FLASHCFG 7 |
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64 | #define RB_BOOT_DEVICE_FLSHONCE 8 |
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65 | |||
66 | #define RB_BOOT_KEY_ANY 0 |
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67 | #define RB_BOOT_KEY_DEL 1 |
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68 | |||
69 | #define RB_CPU_MODE_POWERSAVE 0 |
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70 | #define RB_CPU_MODE_REGULAR 1 |
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71 | |||
72 | #define RB_BOOT_PROTOCOL_BOOTP 0 |
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73 | #define RB_BOOT_PROTOCOL_DHCP 1 |
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74 | |||
75 | #define RB_CPU_FREQ_L2 (0 << 3) |
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76 | #define RB_CPU_FREQ_L1 (1 << 3) |
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77 | #define RB_CPU_FREQ_N0 (2 << 3) |
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78 | #define RB_CPU_FREQ_H1 (3 << 3) |
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79 | #define RB_CPU_FREQ_H2 (4 << 3) |
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80 | #define RB_CPU_FREQ_H3 (5 << 3) |
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81 | |||
82 | #define RB_BOOTER_REGULAR 0 |
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83 | #define RB_BOOTER_BACKUP 1 |
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84 | |||
85 | #endif /* _RBCFG_H */ |