OpenWrt – Blame information for rev 1

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Rev:
Rev Author Line No. Line
1 office 1 --- a/arch/arm/boot/dts/s5pv210.dtsi
2 +++ b/arch/arm/boot/dts/s5pv210.dtsi
3 @@ -95,6 +95,16 @@
4 status = "disabled";
5 };
6  
7 + nand: nand@b0000000 {
8 + compatible = "samsung,s5pv210-nand";
9 + reg = <0xb0e00000 0x40>, <0xb0e20000 0x200>;
10 + clocks = <&clocks CLK_NANDXL>, <&clocks CLK_NFCON>;
11 + clock-names = "nandxl", "nand";
12 + #address-cells = <1>;
13 + #size-cells = <1>;
14 + status = "disabled";
15 + };
16 +
17 chipid@e0000000 {
18 compatible = "samsung,s5pv210-chipid";
19 reg = <0xe0000000 0x1000>;
20 --- a/drivers/mtd/nand/Kconfig
21 +++ b/drivers/mtd/nand/Kconfig
22 @@ -181,6 +181,12 @@ config MTD_NAND_S3C2410_CLKSTOP
23 when the is NAND chip selected or released, but will save
24 approximately 5mA of power when there is nothing happening.
25  
26 +config MTD_NAND_S5PXX
27 + tristate "NAND Flash support for Samsung S5Pxx SoCs"
28 + depends on ARCH_S5PV210
29 + help
30 + This enables the NAND flash controller on the S5Pxx SoCs
31 +
32 config MTD_NAND_TANGO
33 tristate "NAND Flash support for Tango chips"
34 depends on ARCH_TANGO || COMPILE_TEST
35 --- a/drivers/mtd/nand/Makefile
36 +++ b/drivers/mtd/nand/Makefile
37 @@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_NAND_DENALI_DT) += dena
38 obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
39 obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o
40 obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
41 +obj-$(CONFIG_MTD_NAND_S5PXX) += s5pxx_nand.o
42 obj-$(CONFIG_MTD_NAND_TANGO) += tango_nand.o
43 obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o
44 obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o