OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | / { |
2 | #address-cells = <1>; |
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3 | #size-cells = <1>; |
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4 | compatible = "ralink,rt2880-soc"; |
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5 | |||
6 | cpus { |
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7 | cpu@0 { |
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8 | compatible = "mips,mips24KEc"; |
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9 | }; |
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10 | }; |
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11 | |||
12 | chosen { |
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13 | bootargs = "console=ttyS0,57600"; |
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14 | }; |
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15 | |||
16 | aliases { |
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17 | serial0 = &uartlite; |
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18 | }; |
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19 | |||
3 | office | 20 | cpuintc: cpuintc@0 { |
1 | office | 21 | #address-cells = <0>; |
22 | #interrupt-cells = <1>; |
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23 | interrupt-controller; |
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24 | compatible = "mti,cpu-interrupt-controller"; |
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25 | }; |
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26 | |||
27 | palmbus: palmbus@300000 { |
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28 | compatible = "palmbus"; |
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29 | reg = <0x300000 0x200000>; |
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30 | ranges = <0x0 0x300000 0x1FFFFF>; |
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31 | |||
32 | #address-cells = <1>; |
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33 | #size-cells = <1>; |
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34 | |||
35 | sysc: sysc@0 { |
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36 | compatible = "ralink,rt2880-sysc"; |
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37 | reg = <0x000 0x100>; |
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38 | }; |
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39 | |||
40 | timer: timer@100 { |
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41 | compatible = "ralink,rt2880-timer"; |
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42 | reg = <0x100 0x20>; |
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43 | |||
44 | interrupt-parent = <&intc>; |
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45 | interrupts = <1>; |
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46 | |||
47 | status = "disabled"; |
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48 | }; |
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49 | |||
50 | watchdog: watchdog@120 { |
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51 | compatible = "ralink,rt2880-wdt"; |
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52 | reg = <0x120 0x10>; |
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53 | }; |
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54 | |||
55 | intc: intc@200 { |
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56 | compatible = "ralink,rt2880-intc"; |
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57 | reg = <0x200 0x100>; |
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58 | |||
59 | interrupt-controller; |
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60 | #interrupt-cells = <1>; |
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61 | |||
62 | interrupt-parent = <&cpuintc>; |
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63 | interrupts = <2>; |
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64 | }; |
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65 | |||
66 | memc: memc@300 { |
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67 | compatible = "ralink,rt2880-memc"; |
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68 | reg = <0x300 0x100>; |
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69 | }; |
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70 | |||
71 | gpio0: gpio@600 { |
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72 | compatible = "ralink,rt2880-gpio"; |
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73 | reg = <0x600 0x34>; |
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74 | |||
75 | gpio-controller; |
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76 | #gpio-cells = <2>; |
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77 | |||
78 | ralink,gpio-base = <0>; |
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3 | office | 79 | ralink,num-gpios = <24>; |
1 | office | 80 | ralink,register-map = [ 00 04 08 0c |
81 | 20 24 28 2c |
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82 | 30 34 ]; |
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83 | }; |
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84 | |||
85 | gpio1: gpio@638 { |
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86 | compatible = "ralink,rt2880-gpio"; |
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87 | reg = <0x638 0x24>; |
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88 | |||
89 | gpio-controller; |
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90 | #gpio-cells = <2>; |
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91 | |||
92 | ralink,gpio-base = <24>; |
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3 | office | 93 | ralink,num-gpios = <16>; |
1 | office | 94 | ralink,register-map = [ 00 04 08 0c |
95 | 10 14 18 1c |
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96 | 20 24 ]; |
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97 | |||
98 | status = "disabled"; |
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99 | }; |
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100 | |||
101 | gpio2: gpio@660 { |
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102 | compatible = "ralink,rt2880-gpio"; |
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103 | reg = <0x660 0x24>; |
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104 | |||
105 | gpio-controller; |
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106 | #gpio-cells = <2>; |
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107 | |||
108 | ralink,gpio-base = <40>; |
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3 | office | 109 | ralink,num-gpios = <32>; |
1 | office | 110 | ralink,register-map = [ 00 04 08 0c |
111 | 10 14 18 1c |
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112 | 20 24 ]; |
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113 | |||
114 | status = "disabled"; |
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115 | }; |
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116 | |||
117 | i2c: i2c@900 { |
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118 | compatible = "ralink,rt2880-i2c"; |
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119 | reg = <0x900 0x100>; |
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120 | |||
121 | resets = <&rstctrl 9>; |
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122 | reset-names = "i2c"; |
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123 | |||
124 | #address-cells = <1>; |
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125 | #size-cells = <0>; |
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126 | |||
127 | status = "disabled"; |
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128 | |||
129 | pinctrl-names = "default"; |
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130 | pinctrl-0 = <&i2c_pins>; |
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131 | }; |
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132 | |||
133 | uartlite: uartlite@c00 { |
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134 | compatible = "ralink,rt2880-uart", "ns16550a"; |
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135 | reg = <0xc00 0x100>; |
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136 | |||
137 | interrupt-parent = <&intc>; |
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138 | interrupts = <8>; |
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139 | |||
140 | reg-shift = <2>; |
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141 | }; |
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142 | }; |
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143 | |||
144 | pinctrl: pinctrl { |
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145 | compatible = "ralink,rt2880-pinmux"; |
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146 | |||
147 | pinctrl-names = "default"; |
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148 | pinctrl-0 = <&state_default>; |
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149 | |||
150 | state_default: pinctrl0 { |
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151 | sdram { |
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152 | ralink,group = "sdram"; |
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153 | ralink,function = "sdram"; |
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154 | }; |
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155 | }; |
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156 | |||
3 | office | 157 | i2c_pins: i2c { |
158 | i2c { |
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1 | office | 159 | ralink,group = "i2c"; |
160 | ralink,function = "i2c"; |
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161 | }; |
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162 | }; |
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163 | |||
3 | office | 164 | spi_pins: spi { |
165 | spi { |
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1 | office | 166 | ralink,group = "spi"; |
167 | ralink,function = "spi"; |
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168 | }; |
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169 | }; |
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170 | |||
171 | uartlite_pins: uartlite { |
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172 | uart { |
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173 | ralink,group = "uartlite"; |
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174 | ralink,function = "uartlite"; |
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175 | }; |
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176 | }; |
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177 | }; |
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178 | |||
179 | rstctrl: rstctrl { |
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180 | compatible = "ralink,rt2880-reset"; |
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181 | #reset-cells = <1>; |
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182 | }; |
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183 | |||
184 | clkctrl: clkctrl { |
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185 | compatible = "ralink,rt2880-clock"; |
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186 | #clock-cells = <1>; |
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187 | }; |
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188 | |||
189 | pci: pci@440000 { |
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190 | compatible = "ralink,rt288x-pci"; |
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191 | reg = <0x00440000 0x20000>; |
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3 | office | 192 | #address-cells = <1>; |
193 | #size-cells = <1>; |
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1 | office | 194 | status = "disabled"; |
195 | }; |
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196 | |||
197 | ethernet: ethernet@400000 { |
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198 | compatible = "ralink,rt2880-eth"; |
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199 | reg = <0x00400000 0x10000>; |
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200 | |||
201 | #address-cells = <1>; |
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202 | #size-cells = <0>; |
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203 | |||
204 | resets = <&rstctrl 18>; |
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205 | reset-names = "fe"; |
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206 | |||
207 | interrupt-parent = <&cpuintc>; |
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208 | interrupts = <5>; |
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209 | |||
210 | status = "disabled"; |
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211 | |||
212 | port@0 { |
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213 | compatible = "ralink,rt2880-port", "mediatek,eth-port"; |
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214 | reg = <0>; |
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215 | }; |
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216 | |||
217 | mdio-bus { |
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218 | #address-cells = <1>; |
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219 | #size-cells = <0>; |
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220 | |||
221 | status = "disabled"; |
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222 | }; |
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223 | }; |
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224 | |||
225 | wmac: wmac@480000 { |
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226 | compatible = "ralink,rt2880-wmac"; |
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227 | reg = <0x480000 0x40000>; |
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228 | |||
229 | interrupt-parent = <&cpuintc>; |
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230 | interrupts = <6>; |
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231 | |||
232 | ralink,eeprom = "soc_wmac.eeprom"; |
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233 | }; |
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234 | }; |