OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | / { |
2 | #address-cells = <1>; |
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3 | #size-cells = <1>; |
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4 | compatible = "ralink,mt7620a-soc"; |
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5 | |||
6 | cpus { |
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7 | #address-cells = <1>; |
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8 | #size-cells = <0>; |
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9 | |||
10 | cpu@0 { |
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11 | compatible = "mips,mips24KEc"; |
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12 | reg = <0>; |
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13 | }; |
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14 | }; |
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15 | |||
16 | chosen { |
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17 | bootargs = "console=ttyS0,57600"; |
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18 | }; |
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19 | |||
20 | cpuintc: cpuintc { |
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21 | #address-cells = <0>; |
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22 | #interrupt-cells = <1>; |
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23 | interrupt-controller; |
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24 | compatible = "mti,cpu-interrupt-controller"; |
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25 | }; |
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26 | |||
27 | aliases { |
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28 | spi0 = &spi0; |
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29 | spi1 = &spi1; |
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30 | serial0 = &uartlite; |
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31 | }; |
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32 | |||
33 | palmbus: palmbus@10000000 { |
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34 | compatible = "palmbus"; |
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35 | reg = <0x10000000 0x200000>; |
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36 | ranges = <0x0 0x10000000 0x1FFFFF>; |
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37 | |||
38 | #address-cells = <1>; |
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39 | #size-cells = <1>; |
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40 | |||
41 | sysc: sysc@0 { |
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42 | compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon"; |
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43 | reg = <0x0 0x100>; |
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44 | }; |
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45 | |||
46 | timer: timer@100 { |
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47 | compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer"; |
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48 | reg = <0x100 0x20>; |
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49 | |||
50 | interrupt-parent = <&intc>; |
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51 | interrupts = <1>; |
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52 | }; |
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53 | |||
54 | watchdog: watchdog@120 { |
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55 | compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt"; |
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56 | reg = <0x120 0x10>; |
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57 | |||
58 | resets = <&rstctrl 8>; |
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59 | reset-names = "wdt"; |
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60 | |||
61 | interrupt-parent = <&intc>; |
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62 | interrupts = <1>; |
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63 | }; |
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64 | |||
65 | intc: intc@200 { |
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66 | compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc"; |
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67 | reg = <0x200 0x100>; |
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68 | |||
69 | resets = <&rstctrl 19>; |
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70 | reset-names = "intc"; |
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71 | |||
72 | interrupt-controller; |
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73 | #interrupt-cells = <1>; |
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74 | |||
75 | interrupt-parent = <&cpuintc>; |
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76 | interrupts = <2>; |
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77 | }; |
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78 | |||
79 | memc: memc@300 { |
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80 | compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; |
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81 | reg = <0x300 0x100>; |
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82 | |||
83 | resets = <&rstctrl 20>; |
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84 | reset-names = "mc"; |
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85 | |||
86 | interrupt-parent = <&intc>; |
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87 | interrupts = <3>; |
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88 | }; |
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89 | |||
90 | uart: uart@500 { |
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91 | compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; |
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92 | reg = <0x500 0x100>; |
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93 | |||
94 | resets = <&rstctrl 12>; |
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95 | reset-names = "uart"; |
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96 | |||
97 | interrupt-parent = <&intc>; |
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98 | interrupts = <5>; |
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99 | |||
100 | reg-shift = <2>; |
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101 | |||
102 | status = "disabled"; |
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103 | }; |
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104 | |||
105 | gpio0: gpio@600 { |
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106 | compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; |
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107 | reg = <0x600 0x34>; |
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108 | |||
109 | resets = <&rstctrl 13>; |
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110 | reset-names = "pio"; |
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111 | |||
112 | interrupt-parent = <&intc>; |
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113 | interrupts = <6>; |
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114 | |||
115 | gpio-controller; |
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116 | #gpio-cells = <2>; |
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117 | |||
118 | ralink,gpio-base = <0>; |
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119 | ralink,nr-gpio = <24>; |
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120 | ralink,register-map = [ 00 04 08 0c |
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121 | 20 24 28 2c |
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122 | 30 34 ]; |
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123 | }; |
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124 | |||
125 | gpio1: gpio@638 { |
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126 | compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; |
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127 | reg = <0x638 0x24>; |
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128 | |||
129 | interrupt-parent = <&intc>; |
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130 | interrupts = <6>; |
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131 | |||
132 | gpio-controller; |
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133 | #gpio-cells = <2>; |
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134 | |||
135 | ralink,gpio-base = <24>; |
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136 | ralink,nr-gpio = <16>; |
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137 | ralink,register-map = [ 00 04 08 0c |
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138 | 10 14 18 1c |
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139 | 20 24 ]; |
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140 | |||
141 | status = "disabled"; |
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142 | }; |
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143 | |||
144 | gpio2: gpio@660 { |
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145 | compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; |
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146 | reg = <0x660 0x24>; |
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147 | |||
148 | interrupt-parent = <&intc>; |
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149 | interrupts = <6>; |
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150 | |||
151 | gpio-controller; |
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152 | #gpio-cells = <2>; |
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153 | |||
154 | ralink,gpio-base = <40>; |
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155 | ralink,nr-gpio = <32>; |
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156 | ralink,register-map = [ 00 04 08 0c |
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157 | 10 14 18 1c |
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158 | 20 24 ]; |
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159 | |||
160 | status = "disabled"; |
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161 | }; |
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162 | |||
163 | gpio3: gpio@688 { |
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164 | compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; |
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165 | reg = <0x688 0x24>; |
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166 | |||
167 | interrupt-parent = <&intc>; |
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168 | interrupts = <6>; |
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169 | |||
170 | gpio-controller; |
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171 | #gpio-cells = <2>; |
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172 | |||
173 | ralink,gpio-base = <72>; |
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174 | ralink,nr-gpio = <1>; |
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175 | ralink,register-map = [ 00 04 08 0c |
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176 | 10 14 18 1c |
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177 | 20 24 ]; |
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178 | |||
179 | status = "disabled"; |
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180 | }; |
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181 | |||
182 | i2c: i2c@900 { |
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183 | compatible = "ralink,rt2880-i2c"; |
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184 | reg = <0x900 0x100>; |
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185 | |||
186 | resets = <&rstctrl 16>; |
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187 | reset-names = "i2c"; |
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188 | |||
189 | #address-cells = <1>; |
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190 | #size-cells = <0>; |
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191 | |||
192 | status = "disabled"; |
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193 | |||
194 | pinctrl-names = "default"; |
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195 | pinctrl-0 = <&i2c_pins>; |
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196 | }; |
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197 | |||
198 | i2s: i2s@a00 { |
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199 | compatible = "mediatek,mt7620-i2s"; |
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200 | reg = <0xa00 0x100>; |
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201 | |||
202 | resets = <&rstctrl 17>; |
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203 | reset-names = "i2s"; |
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204 | |||
205 | interrupt-parent = <&intc>; |
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206 | interrupts = <10>; |
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207 | |||
208 | txdma-req = <2>; |
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209 | rxdma-req = <3>; |
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210 | |||
211 | dmas = <&gdma 4>, |
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212 | <&gdma 6>; |
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213 | dma-names = "tx", "rx"; |
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214 | |||
215 | status = "disabled"; |
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216 | }; |
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217 | |||
218 | spi0: spi@b00 { |
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219 | compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi"; |
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220 | reg = <0xb00 0x40>; |
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221 | |||
222 | resets = <&rstctrl 18>; |
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223 | reset-names = "spi"; |
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224 | |||
225 | #address-cells = <1>; |
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226 | #size-cells = <0>; |
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227 | |||
228 | status = "disabled"; |
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229 | |||
230 | pinctrl-names = "default"; |
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231 | pinctrl-0 = <&spi_pins>; |
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232 | }; |
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233 | |||
234 | spi1: spi@b40 { |
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235 | compatible = "ralink,rt2880-spi"; |
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236 | reg = <0xb40 0x60>; |
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237 | |||
238 | resets = <&rstctrl 18>; |
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239 | reset-names = "spi"; |
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240 | |||
241 | #address-cells = <1>; |
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242 | #size-cells = <0>; |
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243 | |||
244 | status = "disabled"; |
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245 | |||
246 | pinctrl-names = "default"; |
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247 | pinctrl-0 = <&spi_cs1>; |
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248 | }; |
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249 | |||
250 | uartlite: uartlite@c00 { |
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251 | compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; |
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252 | reg = <0xc00 0x100>; |
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253 | |||
254 | resets = <&rstctrl 19>; |
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255 | reset-names = "uartl"; |
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256 | |||
257 | interrupt-parent = <&intc>; |
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258 | interrupts = <12>; |
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259 | |||
260 | reg-shift = <2>; |
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261 | |||
262 | pinctrl-names = "default"; |
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263 | pinctrl-0 = <&uartlite_pins>; |
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264 | }; |
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265 | |||
266 | systick: systick@d00 { |
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267 | compatible = "ralink,mt7620a-systick", "ralink,cevt-systick"; |
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268 | reg = <0xd00 0x10>; |
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269 | |||
270 | resets = <&rstctrl 28>; |
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271 | reset-names = "intc"; |
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272 | |||
273 | interrupt-parent = <&cpuintc>; |
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274 | interrupts = <7>; |
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275 | }; |
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276 | |||
277 | pcm: pcm@2000 { |
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278 | compatible = "ralink,mt7620a-pcm"; |
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279 | reg = <0x2000 0x800>; |
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280 | |||
281 | resets = <&rstctrl 11>; |
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282 | reset-names = "pcm"; |
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283 | |||
284 | interrupt-parent = <&intc>; |
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285 | interrupts = <4>; |
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286 | |||
287 | status = "disabled"; |
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288 | }; |
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289 | |||
290 | gdma: gdma@2800 { |
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291 | compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma"; |
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292 | reg = <0x2800 0x800>; |
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293 | |||
294 | resets = <&rstctrl 14>; |
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295 | reset-names = "dma"; |
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296 | |||
297 | interrupt-parent = <&intc>; |
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298 | interrupts = <7>; |
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299 | |||
300 | #dma-cells = <1>; |
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301 | #dma-channels = <16>; |
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302 | #dma-requests = <16>; |
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303 | |||
304 | status = "disabled"; |
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305 | }; |
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306 | }; |
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307 | |||
308 | pinctrl: pinctrl { |
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309 | compatible = "ralink,rt2880-pinmux"; |
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310 | pinctrl-names = "default"; |
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311 | pinctrl-0 = <&state_default>; |
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312 | |||
313 | state_default: pinctrl0 { |
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314 | }; |
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315 | |||
316 | pcm_i2s_pins: pcm_i2s { |
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317 | pcm_i2s { |
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318 | ralink,group = "uartf"; |
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319 | ralink,function = "pcm i2s"; |
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320 | }; |
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321 | }; |
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322 | |||
323 | uartf_gpio_pins: uartf_gpio { |
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324 | uartf_gpio { |
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325 | ralink,group = "uartf"; |
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326 | ralink,function = "gpio uartf"; |
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327 | }; |
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328 | }; |
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329 | |||
330 | gpio_i2s_pins: gpio_i2s { |
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331 | gpio_i2s { |
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332 | ralink,group = "uartf"; |
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333 | ralink,function = "gpio i2s"; |
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334 | }; |
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335 | }; |
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336 | |||
337 | spi_pins: spi_pins { |
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338 | spi_pins { |
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339 | ralink,group = "spi"; |
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340 | ralink,function = "spi"; |
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341 | }; |
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342 | }; |
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343 | |||
344 | spi_cs1: spi1 { |
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345 | spi1 { |
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346 | ralink,group = "spi refclk"; |
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347 | ralink,function = "spi refclk"; |
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348 | }; |
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349 | }; |
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350 | |||
351 | i2c_pins: i2c_pins { |
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352 | i2c_pins { |
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353 | ralink,group = "i2c"; |
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354 | ralink,function = "i2c"; |
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355 | }; |
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356 | }; |
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357 | |||
358 | uartlite_pins: uartlite { |
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359 | uart { |
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360 | ralink,group = "uartlite"; |
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361 | ralink,function = "uartlite"; |
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362 | }; |
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363 | }; |
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364 | |||
365 | mdio_pins: mdio { |
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366 | mdio { |
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367 | ralink,group = "mdio"; |
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368 | ralink,function = "mdio"; |
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369 | }; |
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370 | }; |
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371 | |||
372 | mdio_refclk_pins: mdio_refclk { |
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373 | mdio_refclk { |
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374 | ralink,group = "mdio"; |
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375 | ralink,function = "refclk"; |
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376 | }; |
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377 | }; |
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378 | |||
379 | ephy_pins: ephy { |
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380 | ephy { |
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381 | ralink,group = "ephy"; |
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382 | ralink,function = "ephy"; |
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383 | }; |
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384 | }; |
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385 | |||
386 | wled_pins: wled { |
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387 | wled { |
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388 | ralink,group = "wled"; |
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389 | ralink,function = "wled"; |
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390 | }; |
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391 | }; |
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392 | |||
393 | rgmii1_pins: rgmii1 { |
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394 | rgmii1 { |
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395 | ralink,group = "rgmii1"; |
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396 | ralink,function = "rgmii1"; |
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397 | }; |
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398 | }; |
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399 | |||
400 | rgmii2_pins: rgmii2 { |
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401 | rgmii2 { |
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402 | ralink,group = "rgmii2"; |
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403 | ralink,function = "rgmii2"; |
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404 | }; |
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405 | }; |
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406 | |||
407 | pcie_pins: pcie { |
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408 | pcie { |
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409 | ralink,group = "pcie"; |
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410 | ralink,function = "pcie rst"; |
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411 | }; |
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412 | }; |
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413 | |||
414 | pa_pins: pa { |
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415 | pa { |
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416 | ralink,group = "pa"; |
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417 | ralink,function = "pa"; |
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418 | }; |
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419 | }; |
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420 | |||
421 | sdhci_pins: sdhci { |
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422 | sdhci { |
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423 | ralink,group = "nd_sd"; |
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424 | ralink,function = "sd"; |
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425 | }; |
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426 | }; |
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427 | }; |
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428 | |||
429 | rstctrl: rstctrl { |
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430 | compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset"; |
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431 | #reset-cells = <1>; |
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432 | }; |
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433 | |||
434 | clkctrl: clkctrl { |
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435 | compatible = "ralink,rt2880-clock"; |
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436 | #clock-cells = <1>; |
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437 | }; |
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438 | |||
439 | usbphy: usbphy { |
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440 | compatible = "mediatek,mt7620-usbphy"; |
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441 | #phy-cells = <0>; |
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442 | |||
443 | ralink,sysctl = <&sysc>; |
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444 | resets = <&rstctrl 22 &rstctrl 25>; |
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445 | reset-names = "host", "device"; |
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446 | |||
447 | clocks = <&clkctrl 22 &clkctrl 25>; |
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448 | clock-names = "host", "device"; |
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449 | }; |
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450 | |||
451 | ethernet: ethernet@10100000 { |
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452 | compatible = "mediatek,mt7620-eth"; |
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453 | reg = <0x10100000 0x10000>; |
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454 | |||
455 | #address-cells = <1>; |
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456 | #size-cells = <0>; |
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457 | |||
458 | interrupt-parent = <&cpuintc>; |
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459 | interrupts = <5>; |
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460 | |||
461 | resets = <&rstctrl 21 &rstctrl 23>; |
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462 | reset-names = "fe", "esw"; |
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463 | |||
464 | mediatek,switch = <&gsw>; |
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465 | |||
466 | port@4 { |
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467 | compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port"; |
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468 | reg = <4>; |
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469 | |||
470 | status = "disabled"; |
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471 | }; |
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472 | |||
473 | port@5 { |
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474 | compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port"; |
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475 | reg = <5>; |
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476 | |||
477 | status = "disabled"; |
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478 | }; |
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479 | |||
480 | mdio-bus { |
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481 | #address-cells = <1>; |
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482 | #size-cells = <0>; |
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483 | |||
484 | status = "disabled"; |
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485 | }; |
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486 | }; |
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487 | |||
488 | gsw: gsw@10110000 { |
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489 | compatible = "mediatek,mt7620-gsw"; |
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490 | reg = <0x10110000 0x8000>; |
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491 | |||
492 | resets = <&rstctrl 23>; |
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493 | reset-names = "esw"; |
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494 | |||
495 | interrupt-parent = <&intc>; |
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496 | interrupts = <17>; |
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497 | }; |
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498 | |||
499 | sdhci: sdhci@10130000 { |
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500 | compatible = "ralink,mt7620-sdhci"; |
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501 | reg = <0x10130000 0x4000>; |
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502 | |||
503 | interrupt-parent = <&intc>; |
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504 | interrupts = <14>; |
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505 | |||
506 | pinctrl-names = "default"; |
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507 | pinctrl-0 = <&sdhci_pins>; |
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508 | |||
509 | status = "disabled"; |
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510 | }; |
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511 | |||
512 | ehci: ehci@101c0000 { |
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513 | #address-cells = <1>; |
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514 | #size-cells = <0>; |
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515 | compatible = "generic-ehci"; |
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516 | reg = <0x101c0000 0x1000>; |
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517 | |||
518 | interrupt-parent = <&intc>; |
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519 | interrupts = <18>; |
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520 | |||
521 | phys = <&usbphy>; |
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522 | phy-names = "usb"; |
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523 | |||
524 | status = "disabled"; |
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525 | |||
526 | ehci_port1: port@1 { |
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527 | reg = <1>; |
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528 | #trigger-source-cells = <0>; |
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529 | }; |
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530 | }; |
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531 | |||
532 | ohci: ohci@101c1000 { |
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533 | #address-cells = <1>; |
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534 | #size-cells = <0>; |
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535 | compatible = "generic-ohci"; |
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536 | reg = <0x101c1000 0x1000>; |
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537 | |||
538 | interrupt-parent = <&intc>; |
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539 | interrupts = <18>; |
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540 | |||
541 | phys = <&usbphy>; |
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542 | phy-names = "usb"; |
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543 | |||
544 | status = "disabled"; |
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545 | |||
546 | ohci_port1: port@1 { |
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547 | reg = <1>; |
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548 | #trigger-source-cells = <0>; |
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549 | }; |
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550 | }; |
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551 | |||
552 | pcie: pcie@10140000 { |
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553 | compatible = "mediatek,mt7620-pci"; |
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554 | reg = <0x10140000 0x100 |
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555 | 0x10142000 0x100>; |
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556 | |||
557 | #address-cells = <3>; |
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558 | #size-cells = <2>; |
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559 | |||
560 | resets = <&rstctrl 26>; |
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561 | reset-names = "pcie0"; |
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562 | |||
563 | clocks = <&clkctrl 26>; |
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564 | clock-names = "pcie0"; |
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565 | |||
566 | interrupt-parent = <&cpuintc>; |
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567 | interrupts = <4>; |
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568 | |||
569 | pinctrl-names = "default"; |
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570 | pinctrl-0 = <&pcie_pins>; |
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571 | |||
572 | device_type = "pci"; |
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573 | |||
574 | bus-range = <0 255>; |
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575 | ranges = < |
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576 | 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */ |
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577 | 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */ |
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578 | >; |
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579 | |||
580 | status = "disabled"; |
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581 | |||
582 | pcie0: pcie@0,0 { |
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583 | reg = <0x0000 0 0 0 0>; |
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584 | |||
585 | #address-cells = <3>; |
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586 | #size-cells = <2>; |
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587 | |||
588 | device_type = "pci"; |
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589 | |||
590 | ranges; |
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591 | }; |
||
592 | }; |
||
593 | |||
594 | wmac: wmac@10180000 { |
||
595 | compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac"; |
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596 | reg = <0x10180000 0x40000>; |
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597 | |||
598 | interrupt-parent = <&cpuintc>; |
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599 | interrupts = <6>; |
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600 | |||
601 | ralink,eeprom = "soc_wmac.eeprom"; |
||
602 | }; |
||
603 | }; |