OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | / { |
2 | #address-cells = <1>; |
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3 | #size-cells = <1>; |
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3 | office | 4 | compatible = "ralink,mtk7620a-soc"; |
1 | office | 5 | |
6 | cpus { |
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7 | cpu@0 { |
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8 | compatible = "mips,mips24KEc"; |
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9 | }; |
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10 | }; |
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11 | |||
12 | chosen { |
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13 | bootargs = "console=ttyS0,57600"; |
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14 | }; |
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15 | |||
3 | office | 16 | cpuintc: cpuintc@0 { |
1 | office | 17 | #address-cells = <0>; |
18 | #interrupt-cells = <1>; |
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19 | interrupt-controller; |
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20 | compatible = "mti,cpu-interrupt-controller"; |
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21 | }; |
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22 | |||
23 | aliases { |
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24 | spi0 = &spi0; |
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25 | spi1 = &spi1; |
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26 | serial0 = &uartlite; |
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27 | }; |
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28 | |||
29 | palmbus: palmbus@10000000 { |
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30 | compatible = "palmbus"; |
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31 | reg = <0x10000000 0x200000>; |
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32 | ranges = <0x0 0x10000000 0x1FFFFF>; |
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33 | |||
34 | #address-cells = <1>; |
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35 | #size-cells = <1>; |
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36 | |||
37 | sysc: sysc@0 { |
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38 | compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon"; |
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39 | reg = <0x0 0x100>; |
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40 | }; |
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41 | |||
42 | timer: timer@100 { |
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43 | compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer"; |
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44 | reg = <0x100 0x20>; |
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45 | |||
46 | interrupt-parent = <&intc>; |
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47 | interrupts = <1>; |
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48 | }; |
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49 | |||
50 | watchdog: watchdog@120 { |
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51 | compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt"; |
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52 | reg = <0x120 0x10>; |
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53 | |||
54 | resets = <&rstctrl 8>; |
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55 | reset-names = "wdt"; |
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56 | |||
57 | interrupt-parent = <&intc>; |
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58 | interrupts = <1>; |
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59 | }; |
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60 | |||
61 | intc: intc@200 { |
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62 | compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc"; |
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63 | reg = <0x200 0x100>; |
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64 | |||
65 | resets = <&rstctrl 19>; |
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66 | reset-names = "intc"; |
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67 | |||
68 | interrupt-controller; |
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69 | #interrupt-cells = <1>; |
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70 | |||
71 | interrupt-parent = <&cpuintc>; |
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72 | interrupts = <2>; |
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73 | }; |
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74 | |||
75 | memc: memc@300 { |
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76 | compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; |
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77 | reg = <0x300 0x100>; |
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78 | |||
79 | resets = <&rstctrl 20>; |
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80 | reset-names = "mc"; |
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81 | |||
82 | interrupt-parent = <&intc>; |
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83 | interrupts = <3>; |
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84 | }; |
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85 | |||
86 | uart: uart@500 { |
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87 | compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; |
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88 | reg = <0x500 0x100>; |
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89 | |||
90 | resets = <&rstctrl 12>; |
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91 | reset-names = "uart"; |
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92 | |||
93 | interrupt-parent = <&intc>; |
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94 | interrupts = <5>; |
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95 | |||
96 | reg-shift = <2>; |
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97 | |||
98 | status = "disabled"; |
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99 | }; |
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100 | |||
101 | gpio0: gpio@600 { |
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102 | compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; |
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103 | reg = <0x600 0x34>; |
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104 | |||
105 | resets = <&rstctrl 13>; |
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106 | reset-names = "pio"; |
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107 | |||
108 | interrupt-parent = <&intc>; |
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109 | interrupts = <6>; |
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110 | |||
111 | gpio-controller; |
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112 | #gpio-cells = <2>; |
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113 | |||
114 | ralink,gpio-base = <0>; |
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3 | office | 115 | ralink,num-gpios = <24>; |
1 | office | 116 | ralink,register-map = [ 00 04 08 0c |
117 | 20 24 28 2c |
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118 | 30 34 ]; |
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119 | }; |
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120 | |||
121 | gpio1: gpio@638 { |
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122 | compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; |
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123 | reg = <0x638 0x24>; |
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124 | |||
125 | interrupt-parent = <&intc>; |
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126 | interrupts = <6>; |
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127 | |||
128 | gpio-controller; |
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129 | #gpio-cells = <2>; |
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130 | |||
131 | ralink,gpio-base = <24>; |
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3 | office | 132 | ralink,num-gpios = <16>; |
1 | office | 133 | ralink,register-map = [ 00 04 08 0c |
134 | 10 14 18 1c |
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135 | 20 24 ]; |
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136 | |||
137 | status = "disabled"; |
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138 | }; |
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139 | |||
140 | gpio2: gpio@660 { |
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141 | compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; |
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142 | reg = <0x660 0x24>; |
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143 | |||
144 | interrupt-parent = <&intc>; |
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145 | interrupts = <6>; |
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146 | |||
147 | gpio-controller; |
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148 | #gpio-cells = <2>; |
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149 | |||
150 | ralink,gpio-base = <40>; |
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3 | office | 151 | ralink,num-gpios = <32>; |
1 | office | 152 | ralink,register-map = [ 00 04 08 0c |
153 | 10 14 18 1c |
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154 | 20 24 ]; |
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155 | |||
156 | status = "disabled"; |
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157 | }; |
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158 | |||
159 | gpio3: gpio@688 { |
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160 | compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; |
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161 | reg = <0x688 0x24>; |
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162 | |||
163 | interrupt-parent = <&intc>; |
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164 | interrupts = <6>; |
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165 | |||
166 | gpio-controller; |
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167 | #gpio-cells = <2>; |
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168 | |||
169 | ralink,gpio-base = <72>; |
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3 | office | 170 | ralink,num-gpios = <1>; |
1 | office | 171 | ralink,register-map = [ 00 04 08 0c |
172 | 10 14 18 1c |
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173 | 20 24 ]; |
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174 | |||
175 | status = "disabled"; |
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176 | }; |
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177 | |||
178 | i2c: i2c@900 { |
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179 | compatible = "ralink,rt2880-i2c"; |
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180 | reg = <0x900 0x100>; |
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181 | |||
182 | resets = <&rstctrl 16>; |
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183 | reset-names = "i2c"; |
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184 | |||
185 | #address-cells = <1>; |
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186 | #size-cells = <0>; |
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187 | |||
188 | status = "disabled"; |
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189 | |||
190 | pinctrl-names = "default"; |
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191 | pinctrl-0 = <&i2c_pins>; |
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192 | }; |
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193 | |||
194 | i2s: i2s@a00 { |
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195 | compatible = "mediatek,mt7620-i2s"; |
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196 | reg = <0xa00 0x100>; |
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197 | |||
198 | resets = <&rstctrl 17>; |
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199 | reset-names = "i2s"; |
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200 | |||
201 | interrupt-parent = <&intc>; |
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202 | interrupts = <10>; |
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203 | |||
204 | txdma-req = <2>; |
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205 | rxdma-req = <3>; |
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206 | |||
207 | dmas = <&gdma 4>, |
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208 | <&gdma 6>; |
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209 | dma-names = "tx", "rx"; |
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210 | |||
211 | status = "disabled"; |
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212 | }; |
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213 | |||
214 | spi0: spi@b00 { |
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215 | compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi"; |
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216 | reg = <0xb00 0x40>; |
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217 | |||
218 | resets = <&rstctrl 18>; |
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219 | reset-names = "spi"; |
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220 | |||
221 | #address-cells = <1>; |
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222 | #size-cells = <0>; |
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223 | |||
224 | status = "disabled"; |
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225 | |||
226 | pinctrl-names = "default"; |
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227 | pinctrl-0 = <&spi_pins>; |
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228 | }; |
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229 | |||
230 | spi1: spi@b40 { |
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231 | compatible = "ralink,rt2880-spi"; |
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232 | reg = <0xb40 0x60>; |
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233 | |||
234 | resets = <&rstctrl 18>; |
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235 | reset-names = "spi"; |
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236 | |||
237 | #address-cells = <1>; |
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238 | #size-cells = <0>; |
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239 | |||
240 | status = "disabled"; |
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241 | |||
242 | pinctrl-names = "default"; |
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243 | pinctrl-0 = <&spi_cs1>; |
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244 | }; |
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245 | |||
246 | uartlite: uartlite@c00 { |
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247 | compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; |
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248 | reg = <0xc00 0x100>; |
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249 | |||
250 | resets = <&rstctrl 19>; |
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251 | reset-names = "uartl"; |
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252 | |||
253 | interrupt-parent = <&intc>; |
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254 | interrupts = <12>; |
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255 | |||
256 | reg-shift = <2>; |
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257 | |||
258 | pinctrl-names = "default"; |
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259 | pinctrl-0 = <&uartlite_pins>; |
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260 | }; |
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261 | |||
262 | systick: systick@d00 { |
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263 | compatible = "ralink,mt7620a-systick", "ralink,cevt-systick"; |
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264 | reg = <0xd00 0x10>; |
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265 | |||
266 | resets = <&rstctrl 28>; |
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267 | reset-names = "intc"; |
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268 | |||
269 | interrupt-parent = <&cpuintc>; |
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270 | interrupts = <7>; |
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271 | }; |
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272 | |||
273 | pcm: pcm@2000 { |
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274 | compatible = "ralink,mt7620a-pcm"; |
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275 | reg = <0x2000 0x800>; |
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276 | |||
277 | resets = <&rstctrl 11>; |
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278 | reset-names = "pcm"; |
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279 | |||
280 | interrupt-parent = <&intc>; |
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281 | interrupts = <4>; |
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282 | |||
283 | status = "disabled"; |
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284 | }; |
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285 | |||
286 | gdma: gdma@2800 { |
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287 | compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma"; |
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288 | reg = <0x2800 0x800>; |
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289 | |||
290 | resets = <&rstctrl 14>; |
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291 | reset-names = "dma"; |
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292 | |||
293 | interrupt-parent = <&intc>; |
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294 | interrupts = <7>; |
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295 | |||
296 | #dma-cells = <1>; |
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297 | #dma-channels = <16>; |
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298 | #dma-requests = <16>; |
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299 | |||
300 | status = "disabled"; |
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301 | }; |
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302 | }; |
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303 | |||
304 | pinctrl: pinctrl { |
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305 | compatible = "ralink,rt2880-pinmux"; |
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306 | pinctrl-names = "default"; |
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307 | pinctrl-0 = <&state_default>; |
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308 | |||
309 | state_default: pinctrl0 { |
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310 | }; |
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311 | |||
312 | pcm_i2s_pins: pcm_i2s { |
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313 | pcm_i2s { |
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314 | ralink,group = "uartf"; |
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315 | ralink,function = "pcm i2s"; |
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316 | }; |
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317 | }; |
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318 | |||
319 | uartf_gpio_pins: uartf_gpio { |
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320 | uartf_gpio { |
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321 | ralink,group = "uartf"; |
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322 | ralink,function = "gpio uartf"; |
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323 | }; |
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324 | }; |
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325 | |||
326 | gpio_i2s_pins: gpio_i2s { |
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327 | gpio_i2s { |
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328 | ralink,group = "uartf"; |
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329 | ralink,function = "gpio i2s"; |
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330 | }; |
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331 | }; |
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332 | |||
3 | office | 333 | spi_pins: spi { |
334 | spi { |
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1 | office | 335 | ralink,group = "spi"; |
336 | ralink,function = "spi"; |
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337 | }; |
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338 | }; |
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339 | |||
340 | spi_cs1: spi1 { |
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341 | spi1 { |
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3 | office | 342 | ralink,group = "spi_cs1"; |
343 | ralink,function = "spi_cs1"; |
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1 | office | 344 | }; |
345 | }; |
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346 | |||
3 | office | 347 | i2c_pins: i2c { |
348 | i2c { |
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1 | office | 349 | ralink,group = "i2c"; |
350 | ralink,function = "i2c"; |
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351 | }; |
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352 | }; |
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353 | |||
354 | uartlite_pins: uartlite { |
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355 | uart { |
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356 | ralink,group = "uartlite"; |
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357 | ralink,function = "uartlite"; |
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358 | }; |
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359 | }; |
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360 | |||
361 | mdio_pins: mdio { |
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362 | mdio { |
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363 | ralink,group = "mdio"; |
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364 | ralink,function = "mdio"; |
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365 | }; |
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366 | }; |
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367 | |||
368 | mdio_refclk_pins: mdio_refclk { |
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369 | mdio_refclk { |
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370 | ralink,group = "mdio"; |
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371 | ralink,function = "refclk"; |
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372 | }; |
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373 | }; |
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374 | |||
375 | ephy_pins: ephy { |
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376 | ephy { |
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377 | ralink,group = "ephy"; |
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378 | ralink,function = "ephy"; |
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379 | }; |
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380 | }; |
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381 | |||
382 | wled_pins: wled { |
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383 | wled { |
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384 | ralink,group = "wled"; |
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385 | ralink,function = "wled"; |
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386 | }; |
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387 | }; |
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388 | |||
389 | rgmii1_pins: rgmii1 { |
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390 | rgmii1 { |
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391 | ralink,group = "rgmii1"; |
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392 | ralink,function = "rgmii1"; |
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393 | }; |
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394 | }; |
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395 | |||
396 | rgmii2_pins: rgmii2 { |
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397 | rgmii2 { |
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398 | ralink,group = "rgmii2"; |
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399 | ralink,function = "rgmii2"; |
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400 | }; |
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401 | }; |
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402 | |||
403 | pcie_pins: pcie { |
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404 | pcie { |
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405 | ralink,group = "pcie"; |
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406 | ralink,function = "pcie rst"; |
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407 | }; |
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408 | }; |
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409 | |||
410 | pa_pins: pa { |
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411 | pa { |
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412 | ralink,group = "pa"; |
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413 | ralink,function = "pa"; |
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414 | }; |
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415 | }; |
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416 | }; |
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417 | |||
418 | rstctrl: rstctrl { |
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419 | compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset"; |
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420 | #reset-cells = <1>; |
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421 | }; |
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422 | |||
423 | clkctrl: clkctrl { |
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424 | compatible = "ralink,rt2880-clock"; |
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425 | #clock-cells = <1>; |
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426 | }; |
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427 | |||
428 | usbphy: usbphy { |
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429 | compatible = "mediatek,mt7620-usbphy"; |
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430 | #phy-cells = <0>; |
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431 | |||
432 | ralink,sysctl = <&sysc>; |
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433 | resets = <&rstctrl 22 &rstctrl 25>; |
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434 | reset-names = "host", "device"; |
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435 | |||
436 | clocks = <&clkctrl 22 &clkctrl 25>; |
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437 | clock-names = "host", "device"; |
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438 | }; |
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439 | |||
440 | ethernet: ethernet@10100000 { |
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441 | compatible = "mediatek,mt7620-eth"; |
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442 | reg = <0x10100000 0x10000>; |
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443 | |||
444 | #address-cells = <1>; |
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445 | #size-cells = <0>; |
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446 | |||
447 | interrupt-parent = <&cpuintc>; |
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448 | interrupts = <5>; |
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449 | |||
450 | resets = <&rstctrl 21 &rstctrl 23>; |
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451 | reset-names = "fe", "esw"; |
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452 | |||
453 | mediatek,switch = <&gsw>; |
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454 | |||
455 | port@4 { |
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456 | compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port"; |
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457 | reg = <4>; |
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458 | |||
459 | status = "disabled"; |
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460 | }; |
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461 | |||
462 | port@5 { |
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463 | compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port"; |
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464 | reg = <5>; |
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465 | |||
466 | status = "disabled"; |
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467 | }; |
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468 | |||
469 | mdio-bus { |
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470 | #address-cells = <1>; |
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471 | #size-cells = <0>; |
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472 | |||
473 | status = "disabled"; |
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474 | }; |
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475 | }; |
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476 | |||
477 | gsw: gsw@10110000 { |
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478 | compatible = "mediatek,mt7620-gsw"; |
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479 | reg = <0x10110000 0x8000>; |
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480 | |||
481 | resets = <&rstctrl 23>; |
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482 | reset-names = "esw"; |
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483 | |||
484 | interrupt-parent = <&intc>; |
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485 | interrupts = <17>; |
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486 | }; |
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487 | |||
488 | sdhci: sdhci@10130000 { |
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489 | compatible = "ralink,mt7620-sdhci"; |
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490 | reg = <0x10130000 0x4000>; |
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491 | |||
492 | interrupt-parent = <&intc>; |
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493 | interrupts = <14>; |
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494 | |||
495 | status = "disabled"; |
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496 | }; |
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497 | |||
498 | ehci: ehci@101c0000 { |
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499 | compatible = "generic-ehci"; |
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500 | reg = <0x101c0000 0x1000>; |
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501 | |||
502 | interrupt-parent = <&intc>; |
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503 | interrupts = <18>; |
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504 | |||
505 | phys = <&usbphy>; |
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506 | phy-names = "usb"; |
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507 | |||
508 | status = "disabled"; |
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509 | }; |
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510 | |||
511 | ohci: ohci@101c1000 { |
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512 | compatible = "generic-ohci"; |
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513 | reg = <0x101c1000 0x1000>; |
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514 | |||
515 | interrupt-parent = <&intc>; |
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516 | interrupts = <18>; |
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517 | |||
518 | phys = <&usbphy>; |
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519 | phy-names = "usb"; |
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520 | |||
521 | status = "disabled"; |
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522 | }; |
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523 | |||
524 | pcie: pcie@10140000 { |
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525 | compatible = "mediatek,mt7620-pci"; |
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526 | reg = <0x10140000 0x100 |
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527 | 0x10142000 0x100>; |
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528 | |||
529 | #address-cells = <3>; |
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530 | #size-cells = <2>; |
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531 | |||
532 | resets = <&rstctrl 26>; |
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533 | reset-names = "pcie0"; |
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534 | |||
535 | clocks = <&clkctrl 26>; |
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536 | clock-names = "pcie0"; |
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537 | |||
538 | interrupt-parent = <&cpuintc>; |
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539 | interrupts = <4>; |
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540 | |||
541 | pinctrl-names = "default"; |
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542 | pinctrl-0 = <&pcie_pins>; |
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543 | |||
544 | device_type = "pci"; |
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545 | |||
546 | bus-range = <0 255>; |
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547 | ranges = < |
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548 | 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */ |
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549 | 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */ |
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550 | >; |
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551 | |||
552 | status = "disabled"; |
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553 | |||
3 | office | 554 | pcie-bridge { |
1 | office | 555 | reg = <0x0000 0 0 0 0>; |
556 | |||
557 | #address-cells = <3>; |
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558 | #size-cells = <2>; |
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559 | |||
560 | device_type = "pci"; |
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561 | }; |
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562 | }; |
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563 | |||
564 | wmac: wmac@10180000 { |
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565 | compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac"; |
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566 | reg = <0x10180000 0x40000>; |
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567 | |||
568 | interrupt-parent = <&cpuintc>; |
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569 | interrupts = <6>; |
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570 | |||
571 | ralink,eeprom = "soc_wmac.eeprom"; |
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572 | }; |
||
573 | }; |