OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "mt7621.dtsi" |
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4 | |||
5 | #include <dt-bindings/gpio/gpio.h> |
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6 | #include <dt-bindings/input/input.h> |
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7 | |||
8 | / { |
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9 | compatible = "zbtlink,zbt-we3526", "mediatek,mt7621-soc"; |
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10 | model = "ZBT-WE3526"; |
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11 | |||
12 | memory@0 { |
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13 | device_type = "memory"; |
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14 | reg = <0x0 0x1c000000>, <0x20000000 0x4000000>; |
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15 | }; |
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16 | |||
17 | chosen { |
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18 | bootargs = "console=ttyS0,115200"; |
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19 | }; |
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20 | |||
21 | palmbus: palmbus@1E000000 { |
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22 | i2c@900 { |
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23 | status = "okay"; |
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24 | }; |
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25 | }; |
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26 | |||
3 | office | 27 | gpio-keys-polled { |
1 | office | 28 | compatible = "gpio-keys-polled"; |
3 | office | 29 | #address-cells = <1>; |
30 | #size-cells = <0>; |
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1 | office | 31 | poll-interval = <20>; |
32 | |||
33 | reset { |
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34 | label = "reset"; |
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35 | gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; |
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36 | linux,code = <KEY_RESTART>; |
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37 | }; |
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38 | }; |
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39 | }; |
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40 | |||
41 | &sdhci { |
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42 | status = "okay"; |
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43 | }; |
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44 | |||
45 | &spi0 { |
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46 | status = "okay"; |
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47 | |||
48 | m25p80@0 { |
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3 | office | 49 | #address-cells = <1>; |
50 | #size-cells = <1>; |
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1 | office | 51 | compatible = "jedec,spi-nor"; |
52 | reg = <0>; |
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53 | spi-max-frequency = <10000000>; |
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3 | office | 54 | m25p,chunked-io = <32>; |
1 | office | 55 | |
3 | office | 56 | partition@0 { |
57 | label = "u-boot"; |
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58 | reg = <0x0 0x30000>; |
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59 | read-only; |
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60 | }; |
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1 | office | 61 | |
3 | office | 62 | partition@30000 { |
63 | label = "u-boot-env"; |
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64 | reg = <0x30000 0x10000>; |
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65 | read-only; |
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66 | }; |
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1 | office | 67 | |
3 | office | 68 | factory: partition@40000 { |
69 | label = "factory"; |
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70 | reg = <0x40000 0x10000>; |
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71 | read-only; |
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72 | }; |
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1 | office | 73 | |
3 | office | 74 | firmware: partition@50000 { |
75 | label = "firmware"; |
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76 | reg = <0x50000 0xfb0000>; |
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1 | office | 77 | }; |
78 | }; |
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79 | }; |
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80 | |||
81 | &pcie { |
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82 | status = "okay"; |
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83 | |||
3 | office | 84 | pcie0 { |
85 | wifi@14c3,7662 { |
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86 | compatible = "pci14c3,7662"; |
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87 | reg = <0x0000 0 0 0 0>; |
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88 | mediatek,mtd-eeprom = <&factory 0x8000>; |
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89 | ieee80211-freq-limit = <5000000 6000000>; |
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1 | office | 90 | |
3 | office | 91 | led { |
92 | led-sources = <2>; |
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93 | }; |
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1 | office | 94 | }; |
95 | }; |
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96 | |||
3 | office | 97 | pcie1 { |
98 | wifi@14c3,7603 { |
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99 | compatible = "pci14c3,7603"; |
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100 | reg = <0x0000 0 0 0 0>; |
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101 | mediatek,mtd-eeprom = <&factory 0x0000>; |
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102 | }; |
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1 | office | 103 | }; |
104 | }; |
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105 | |||
106 | ðernet { |
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107 | mtd-mac-address = <&factory 0xe000>; |
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108 | }; |
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109 | |||
110 | &pinctrl { |
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111 | state_default: pinctrl0 { |
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112 | gpio { |
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113 | ralink,group = "wdt"; |
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114 | ralink,function = "gpio"; |
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115 | }; |
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116 | }; |
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117 | }; |