OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "mt7621.dtsi" |
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4 | |||
5 | #include <dt-bindings/gpio/gpio.h> |
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6 | #include <dt-bindings/input/input.h> |
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7 | |||
8 | / { |
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9 | compatible = "zbtlink,zbt-we1326", "mediatek,mt7621-soc"; |
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10 | model = "ZBT-WE1326"; |
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11 | |||
12 | chosen { |
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13 | bootargs = "console=ttyS0,115200"; |
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14 | }; |
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15 | |||
16 | memory@0 { |
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17 | device_type = "memory"; |
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18 | reg = <0x0 0x1c000000>, <0x20000000 0x4000000>; |
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19 | }; |
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20 | |||
21 | keys { |
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22 | compatible = "gpio-keys-polled"; |
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23 | poll-interval = <20>; |
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24 | |||
25 | reset { |
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26 | label = "reset"; |
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27 | gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; |
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28 | linux,code = <KEY_RESTART>; |
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29 | }; |
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30 | }; |
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31 | }; |
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32 | |||
33 | &pinctrl { |
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34 | state_default: pinctrl0 { |
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35 | gpio { |
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36 | ralink,group = "wdt"; |
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37 | ralink,function = "gpio"; |
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38 | }; |
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39 | }; |
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40 | }; |
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41 | |||
42 | &spi0 { |
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43 | status = "okay"; |
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44 | |||
45 | m25p80@0 { |
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46 | compatible = "jedec,spi-nor"; |
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47 | reg = <0>; |
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48 | spi-max-frequency = <10000000>; |
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49 | |||
50 | partitions { |
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51 | compatible = "fixed-partitions"; |
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52 | #address-cells = <1>; |
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53 | #size-cells = <1>; |
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54 | |||
55 | partition@0 { |
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56 | label = "u-boot"; |
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57 | reg = <0x0 0x30000>; |
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58 | read-only; |
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59 | }; |
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60 | |||
61 | partition@30000 { |
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62 | label = "u-boot-env"; |
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63 | reg = <0x30000 0x10000>; |
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64 | read-only; |
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65 | }; |
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66 | |||
67 | factory: partition@40000 { |
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68 | label = "factory"; |
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69 | reg = <0x40000 0x10000>; |
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70 | read-only; |
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71 | }; |
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72 | |||
73 | partition@50000 { |
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74 | compatible = "denx,uimage"; |
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75 | label = "firmware"; |
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76 | reg = <0x50000 0xfb0000>; |
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77 | }; |
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78 | }; |
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79 | }; |
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80 | }; |
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81 | |||
82 | ðernet { |
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83 | mtd-mac-address = <&factory 0xe000>; |
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84 | }; |
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85 | |||
86 | &pcie { |
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87 | status = "okay"; |
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88 | }; |
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89 | |||
90 | &pcie0 { |
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91 | mt76@0,0 { |
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92 | reg = <0x0000 0 0 0 0>; |
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93 | mediatek,mtd-eeprom = <&factory 0x8000>; |
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94 | ieee80211-freq-limit = <5000000 6000000>; |
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95 | }; |
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96 | }; |
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97 | |||
98 | &pcie1 { |
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99 | mt76@0,0 { |
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100 | reg = <0x0000 0 0 0 0>; |
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101 | mediatek,mtd-eeprom = <&factory 0x0000>; |
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102 | ieee80211-freq-limit = <2400000 2500000>; |
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103 | }; |
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104 | }; |
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105 | |||
106 | &sdhci { |
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107 | status = "okay"; |
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108 | }; |