OpenWrt – Blame information for rev 3

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Rev Author Line No. Line
1 office 1 /dts-v1/;
2  
3 #include "rt3050.dtsi"
4  
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7  
8 / {
9 compatible = "sitecom,wl-351", "ralink,rt3052-soc";
10 model = "Sitecom WL-351 v1 002";
11  
12 cfi@1f000000 {
13 compatible = "cfi-flash";
14 reg = <0x1f000000 0x800000>;
15 bank-width = <2>;
16 device-width = <2>;
3 office 17 #address-cells = <1>;
18 #size-cells = <1>;
1 office 19  
3 office 20 partition@0 {
21 label = "u-boot";
22 reg = <0x0 0x30000>;
23 read-only;
24 };
1 office 25  
3 office 26 partition@30000 {
27 label = "u-boot-env";
28 reg = <0x30000 0x10000>;
29 read-only;
30 };
1 office 31  
3 office 32 factory: partition@40000 {
33 label = "factory";
34 reg = <0x40000 0x10000>;
35 read-only;
36 };
1 office 37  
3 office 38 partition@50000 {
39 label = "firmware";
40 reg = <0x50000 0x3b0000>;
1 office 41 };
42 };
43  
3 office 44 gpio-leds {
1 office 45 compatible = "gpio-leds";
46  
3 office 47 power {
1 office 48 label = "wl-351:amber:power";
49 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
50 };
51  
52 unpopulated {
53 label = "wl-351:amber:unpopulated";
54 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
55 };
56  
57 unpopulated2 {
58 label = "wl-351:blue:unpopulated";
59 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
60 };
61 };
62  
3 office 63 gpio-keys-polled {
1 office 64 compatible = "gpio-keys-polled";
3 office 65 #address-cells = <1>;
66 #size-cells = <0>;
1 office 67 poll-interval = <20>;
68  
69 reset {
70 label = "reset";
71 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
72 linux,code = <KEY_RESTART>;
73 };
74  
75 wps {
76 label = "wps";
77 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
78 linux,code = <KEY_WPS_BUTTON>;
79 };
80 };
81  
82 rtl8366rb {
83 compatible = "realtek,rtl8366rb";
84 gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
85 gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
86 };
87 };
88  
89 &pinctrl {
90 state_default: pinctrl0 {
91 gpio {
92 ralink,group = "spi", "i2c", "jtag", "mdio", "uartf";
93 ralink,function = "gpio";
94 };
95 };
96 };
97  
98 &ethernet {
99 mtd-mac-address = <&factory 0x4>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&rgmii_pins>;
102 };
103  
104 &esw {
105 ralink,rgmii = <1>;
106 mediatek,portmap = <0x3f>;
107 ralink,fct2 = <0x0002500c>;
108 /*
109 * ext phy base addr 31, rx/tx clock skew 0,
110 * turbo mii off, rgmi 3.3v off, port 5 polling off
111 * port5: enabled, gige, full-duplex, rx/tx-flow-control
112 * port6: enabled, gige, full-duplex, rx/tx-flow-control
113 */
114 ralink,fpa2 = <0x1f003fff>;
115 };
116  
117 &wmac {
118 ralink,mtd-eeprom = <&factory 0>;
119 };
120  
121 &otg {
122 status = "okay";
123 };