OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "mt7620a.dtsi" |
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4 | |||
5 | #include <dt-bindings/gpio/gpio.h> |
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6 | #include <dt-bindings/input/input.h> |
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7 | |||
8 | / { |
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9 | compatible = "phicomm,psg1208", "ralink,mt7620a-soc"; |
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10 | model = "Phicomm PSG1208"; |
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11 | |||
12 | aliases { |
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13 | led-boot = &led_wps; |
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14 | led-failsafe = &led_wps; |
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15 | led-running = &led_wps; |
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16 | led-upgrade = &led_wps; |
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17 | }; |
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18 | |||
19 | leds { |
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20 | compatible = "gpio-leds"; |
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21 | |||
22 | led_wps: wps { |
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23 | label = "psg1208:white:wps"; |
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24 | gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; |
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25 | }; |
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26 | |||
27 | wlan { |
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28 | label = "psg1208:white:wlan2g"; |
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29 | gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; |
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30 | }; |
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31 | }; |
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32 | |||
33 | keys { |
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34 | compatible = "gpio-keys-polled"; |
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35 | poll-interval = <20>; |
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36 | |||
37 | reset { |
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38 | label = "reset"; |
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39 | gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; |
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40 | linux,code = <KEY_RESTART>; |
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41 | }; |
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42 | }; |
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43 | }; |
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44 | |||
45 | &gpio1 { |
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46 | status = "okay"; |
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47 | }; |
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48 | |||
49 | &gpio3 { |
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50 | status = "okay"; |
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51 | }; |
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52 | |||
53 | &spi0 { |
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54 | status = "okay"; |
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55 | |||
56 | m25p80@0 { |
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57 | compatible = "jedec,spi-nor"; |
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58 | reg = <0>; |
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59 | spi-max-frequency = <10000000>; |
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60 | |||
61 | partitions { |
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62 | compatible = "fixed-partitions"; |
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63 | #address-cells = <1>; |
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64 | #size-cells = <1>; |
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65 | |||
66 | partition@0 { |
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67 | label = "u-boot"; |
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68 | reg = <0x0 0x30000>; |
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69 | read-only; |
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70 | }; |
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71 | |||
72 | partition@20000 { |
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73 | label = "u-boot-env"; |
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74 | reg = <0x30000 0x10000>; |
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75 | read-only; |
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76 | }; |
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77 | |||
78 | factory: partition@30000 { |
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79 | label = "factory"; |
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80 | reg = <0x40000 0x10000>; |
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81 | read-only; |
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82 | }; |
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83 | |||
84 | partition@40000 { |
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85 | compatible = "denx,uimage"; |
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86 | label = "firmware"; |
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87 | reg = <0x50000 0x7b0000>; |
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88 | }; |
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89 | }; |
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90 | }; |
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91 | }; |
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92 | |||
93 | &pinctrl { |
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94 | state_default: pinctrl0 { |
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95 | gpio { |
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96 | ralink,group = "i2c", "spi refclk", "wled"; |
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97 | ralink,function = "gpio"; |
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98 | }; |
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99 | }; |
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100 | }; |
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101 | |||
102 | ðernet { |
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103 | pinctrl-names = "default"; |
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104 | pinctrl-0 = <&ephy_pins>; |
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105 | mtd-mac-address = <&factory 0x4>; |
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106 | mediatek,portmap = "llllw"; |
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107 | }; |
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108 | |||
109 | &pcie { |
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110 | status = "okay"; |
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111 | }; |
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112 | |||
113 | &pcie0 { |
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114 | mt76@0,0 { |
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115 | reg = <0x0000 0 0 0 0>; |
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116 | mediatek,mtd-eeprom = <&factory 0x8000>; |
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117 | ieee80211-freq-limit = <5000000 6000000>; |
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118 | }; |
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119 | }; |
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120 | |||
121 | &wmac { |
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122 | ralink,mtd-eeprom = <&factory 0>; |
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123 | }; |