OpenWrt – Blame information for rev 2

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Rev Author Line No. Line
1 office 1 /dts-v1/;
2  
3 #include "rt3050.dtsi"
4  
5 #include <dt-bindings/gpio/gpio.h>
6  
7 / {
8 compatible = "planex,mzk-wdpr", "ralink,rt3052-soc";
9 model = "Planex MZK-WDPR";
10  
11 chosen {
12 bootargs = "console=ttyS0,115200";
13 };
14  
15 cfi@1f000000 {
16 compatible = "cfi-flash";
17 reg = <0x1f000000 0x800000>;
18  
19 bank-width = <2>;
20 device-width = <2>;
21  
22 partitions {
23 compatible = "fixed-partitions";
24 #address-cells = <1>;
25 #size-cells = <1>;
26  
27 partition@0 {
28 label = "u-boot";
29 reg = <0x0 0x30000>;
30 read-only;
31 };
32  
33 partition@30000 {
34 label = "u-boot-env";
35 reg = <0x30000 0x10000>;
36 read-only;
37 };
38  
39 factory: partition@40000 {
40 label = "factory";
41 reg = <0x40000 0x10000>;
42 read-only;
43 };
44  
45 partition@7f0000 {
46 label = "Data3G";
47 reg = <0x7f0000 0x10000>;
48 read-only;
49 };
50  
51 partition@50000 {
52 compatible = "denx,uimage";
53 label = "firmware";
54 reg = <0x50000 0x680000>;
55 };
56 };
57 };
58  
59 gpio-export {
60 compatible = "gpio-export";
61  
62 lcd_ctrl1 {
63 gpio-export,name = "lcd_ctrl1";
64 gpio-export,output = <0>;
65 gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
66 };
67 };
68 };
69  
70 &pinctrl {
71 state_default: pinctrl0 {
72 gpio {
73 ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
74 ralink,function = "gpio";
75 };
76 };
77 };
78  
79 &ethernet {
80 mtd-mac-address = <&factory 0x28>;
81 };
82  
83 &esw {
84 mediatek,portmap = <0x2f>;
85 };
86  
87 &wmac {
88 ralink,mtd-eeprom = <&factory 0>;
89 };
90  
91 &otg {
92 status = "okay";
93 };