OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "mt7620a.dtsi" |
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4 | |||
5 | #include <dt-bindings/gpio/gpio.h> |
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6 | #include <dt-bindings/input/input.h> |
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7 | |||
8 | / { |
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9 | compatible = "planex,mzk-750dhp", "ralink,mt7620a-soc"; |
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10 | model = "Planex MZK-750DHP"; |
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11 | |||
3 | office | 12 | gpio-leds { |
1 | office | 13 | compatible = "gpio-leds"; |
14 | |||
15 | wps { |
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16 | label = "mzk-750dhp:green:wps"; |
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17 | gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; |
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18 | }; |
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19 | |||
3 | office | 20 | power { |
1 | office | 21 | label = "mzk-750dhp:green:power"; |
22 | gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; |
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23 | }; |
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24 | |||
25 | wlan5g { |
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26 | label = "mzk-750dhp:green:wlan5g"; |
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27 | gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; |
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28 | }; |
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29 | }; |
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30 | |||
3 | office | 31 | gpio-keys-polled { |
1 | office | 32 | compatible = "gpio-keys-polled"; |
3 | office | 33 | #address-cells = <1>; |
34 | #size-cells = <0>; |
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1 | office | 35 | poll-interval = <20>; |
36 | |||
37 | s1 { |
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38 | label = "reset"; |
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39 | gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; |
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40 | linux,code = <KEY_RESTART>; |
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41 | }; |
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42 | |||
43 | s2 { |
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44 | label = "wps"; |
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45 | gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; |
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46 | linux,code = <KEY_WPS_BUTTON>; |
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47 | }; |
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48 | }; |
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49 | }; |
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50 | |||
51 | &gpio1 { |
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52 | status = "okay"; |
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53 | }; |
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54 | |||
55 | &gpio2 { |
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56 | status = "okay"; |
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57 | }; |
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58 | |||
59 | &spi0 { |
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60 | status = "okay"; |
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61 | |||
62 | m25p80@0 { |
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3 | office | 63 | #address-cells = <1>; |
64 | #size-cells = <1>; |
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1 | office | 65 | compatible = "jedec,spi-nor"; |
66 | reg = <0>; |
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67 | spi-max-frequency = <10000000>; |
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68 | |||
3 | office | 69 | partition@0 { |
70 | label = "u-boot"; |
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71 | reg = <0x0 0x30000>; |
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72 | read-only; |
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73 | }; |
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1 | office | 74 | |
3 | office | 75 | partition@30000 { |
76 | label = "u-boot-env"; |
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77 | reg = <0x30000 0x10000>; |
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78 | read-only; |
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79 | }; |
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1 | office | 80 | |
3 | office | 81 | factory: partition@40000 { |
82 | label = "factory"; |
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83 | reg = <0x40000 0x10000>; |
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84 | read-only; |
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85 | }; |
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1 | office | 86 | |
3 | office | 87 | partition@50000 { |
88 | label = "firmware"; |
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89 | reg = <0x50000 0x7b0000>; |
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1 | office | 90 | }; |
91 | }; |
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92 | }; |
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93 | |||
94 | &pinctrl { |
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95 | state_default: pinctrl0 { |
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96 | gpio { |
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97 | ralink,group = "i2c", "spi refclk", "rgmii1", "nd_sd"; |
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98 | ralink,function = "gpio"; |
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99 | }; |
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100 | }; |
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101 | }; |
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102 | |||
103 | ðernet { |
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104 | pinctrl-names = "default"; |
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105 | pinctrl-0 = <&ephy_pins>; |
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106 | mtd-mac-address = <&factory 0x4>; |
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107 | mediatek,portmap = "llllw"; |
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108 | }; |
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109 | |||
110 | &gsw { |
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111 | mediatek,port4 = "ephy"; |
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112 | }; |
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113 | |||
114 | &wmac { |
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115 | ralink,mtd-eeprom = <&factory 0>; |
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116 | }; |
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117 | |||
118 | &pcie { |
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119 | status = "okay"; |
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120 | |||
3 | office | 121 | pcie-bridge { |
122 | mt76@0,0 { |
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123 | reg = <0x0000 0 0 0 0>; |
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124 | device_type = "pci"; |
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125 | mediatek,mtd-eeprom = <&factory 0x8000>; |
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126 | }; |
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1 | office | 127 | }; |
128 | }; |