OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "mt7620a.dtsi" |
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4 | |||
5 | / { |
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6 | compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc"; |
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7 | model = "Ralink MT7620a + MT7530 evaluation board"; |
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8 | }; |
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9 | |||
10 | &spi0 { |
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11 | status = "okay"; |
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12 | |||
13 | m25p80@0 { |
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3 | office | 14 | #address-cells = <1>; |
15 | #size-cells = <1>; |
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1 | office | 16 | compatible = "jedec,spi-nor"; |
17 | reg = <0>; |
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18 | spi-max-frequency = <10000000>; |
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19 | |||
3 | office | 20 | partition@0 { |
21 | label = "u-boot"; |
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22 | reg = <0x0 0x30000>; |
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23 | read-only; |
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24 | }; |
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1 | office | 25 | |
3 | office | 26 | partition@30000 { |
27 | label = "u-boot-env"; |
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28 | reg = <0x30000 0x10000>; |
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29 | read-only; |
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30 | }; |
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1 | office | 31 | |
3 | office | 32 | factory: partition@40000 { |
33 | label = "factory"; |
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34 | reg = <0x40000 0x10000>; |
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35 | read-only; |
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36 | }; |
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1 | office | 37 | |
3 | office | 38 | partition@50000 { |
39 | label = "firmware"; |
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40 | reg = <0x50000 0x7b0000>; |
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1 | office | 41 | }; |
42 | }; |
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43 | }; |
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44 | |||
45 | &pinctrl { |
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46 | state_default: pinctrl0 { |
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47 | gpio { |
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48 | ralink,group = "i2c", "uartf"; |
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49 | ralink,function = "gpio"; |
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50 | }; |
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51 | }; |
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52 | }; |
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53 | |||
54 | ðernet { |
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55 | status = "okay"; |
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56 | pinctrl-names = "default"; |
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57 | pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; |
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58 | mediatek,portmap = "llllw"; |
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59 | |||
60 | port@5 { |
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61 | status = "okay"; |
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62 | mediatek,fixed-link = <1000 1 1 1>; |
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63 | phy-mode = "rgmii"; |
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64 | }; |
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65 | |||
66 | mdio-bus { |
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67 | status = "okay"; |
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68 | |||
69 | phy0: ethernet-phy@0 { |
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70 | reg = <0>; |
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71 | phy-mode = "rgmii"; |
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72 | }; |
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73 | |||
74 | phy1: ethernet-phy@1 { |
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75 | reg = <1>; |
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76 | phy-mode = "rgmii"; |
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77 | }; |
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78 | |||
79 | phy2: ethernet-phy@2 { |
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80 | reg = <2>; |
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81 | phy-mode = "rgmii"; |
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82 | }; |
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83 | |||
84 | phy3: ethernet-phy@3 { |
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85 | reg = <3>; |
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86 | phy-mode = "rgmii"; |
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87 | }; |
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88 | |||
89 | phy4: ethernet-phy@4 { |
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90 | reg = <4>; |
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91 | phy-mode = "rgmii"; |
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92 | }; |
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93 | |||
94 | phy1f: ethernet-phy@1f { |
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95 | reg = <0x1f>; |
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96 | phy-mode = "rgmii"; |
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97 | }; |
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98 | }; |
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99 | }; |
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100 | |||
101 | &gsw { |
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102 | mediatek,port4 = "gmac"; |
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3 | office | 103 | mediatek,mt7530 = <1>; |
1 | office | 104 | }; |
105 | |||
106 | &pcie { |
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107 | status = "okay"; |
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108 | }; |
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109 | |||
110 | &ehci { |
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111 | status = "okay"; |
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112 | }; |
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113 | |||
114 | &ohci { |
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115 | status = "okay"; |
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116 | }; |