OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Device Tree file for the Linksys E1700 |
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3 | * |
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4 | * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org> |
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5 | * |
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6 | * This file is licensed under the terms of the GNU General Public |
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7 | * License version 2. This program is licensed "as is" without any |
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8 | * warranty of any kind, whether express or implied. |
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9 | */ |
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10 | |||
11 | /dts-v1/; |
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12 | |||
13 | #include "mt7620a.dtsi" |
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14 | |||
15 | #include <dt-bindings/gpio/gpio.h> |
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16 | #include <dt-bindings/input/input.h> |
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17 | |||
18 | / { |
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19 | compatible = "linksys,e1700", "ralink,mt7620a-soc"; |
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20 | model = "Linksys E1700"; |
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21 | |||
22 | aliases { |
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23 | led-boot = &led_power; |
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24 | led-failsafe = &led_power; |
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25 | led-running = &led_power; |
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26 | led-upgrade = &led_power; |
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27 | }; |
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28 | |||
29 | keys { |
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30 | compatible = "gpio-keys-polled"; |
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31 | poll-interval = <20>; |
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32 | |||
33 | reset { |
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34 | label = "reset"; |
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35 | gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; |
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36 | linux,code = <KEY_RESTART>; |
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37 | }; |
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38 | |||
39 | wps { |
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40 | label = "wps"; |
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41 | gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; |
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42 | linux,code = <KEY_WPS_BUTTON>; |
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43 | }; |
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44 | }; |
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45 | |||
46 | leds { |
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47 | compatible = "gpio-leds"; |
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48 | |||
49 | led_power: power { |
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50 | label = "e1700:green:power"; |
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51 | gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; |
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52 | }; |
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53 | |||
54 | wan { |
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55 | label = "e1700:green:wps"; |
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56 | gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; |
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57 | }; |
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58 | }; |
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59 | }; |
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60 | |||
61 | &spi0 { |
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62 | status = "okay"; |
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63 | |||
64 | m25p80@0 { |
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65 | compatible = "jedec,spi-nor"; |
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66 | reg = <0>; |
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67 | spi-max-frequency = <10000000>; |
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68 | |||
69 | partitions { |
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70 | compatible = "fixed-partitions"; |
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71 | #address-cells = <1>; |
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72 | #size-cells = <1>; |
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73 | |||
74 | partition@0 { |
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75 | label = "u-boot"; |
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76 | reg = <0x0 0x30000>; |
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77 | read-only; |
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78 | }; |
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79 | |||
80 | partition@30000 { |
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81 | label = "config"; |
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82 | reg = <0x30000 0x10000>; |
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83 | read-only; |
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84 | }; |
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85 | |||
86 | factory: partition@40000 { |
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87 | label = "factory"; |
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88 | reg = <0x40000 0x10000>; |
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89 | read-only; |
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90 | }; |
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91 | |||
92 | partition@50000 { |
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93 | compatible = "denx,uimage"; |
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94 | label = "firmware"; |
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95 | reg = <0x50000 0x7b0000>; |
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96 | }; |
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97 | }; |
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98 | }; |
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99 | }; |
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100 | |||
101 | &pinctrl { |
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102 | state_default: pinctrl0 { |
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103 | gpio { |
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104 | ralink,group = "i2c", "uartf"; |
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105 | ralink,function = "gpio"; |
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106 | }; |
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107 | }; |
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108 | }; |
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109 | |||
110 | ðernet { |
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111 | status = "okay"; |
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112 | mtd-mac-address = <&factory 0x28>; |
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113 | pinctrl-names = "default"; |
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114 | pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; |
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115 | |||
116 | port@5 { |
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117 | status = "okay"; |
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118 | mediatek,fixed-link = <1000 1 1 1>; |
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119 | phy-mode = "rgmii"; |
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120 | }; |
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121 | |||
122 | mdio-bus { |
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123 | status = "okay"; |
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124 | |||
125 | phy0: ethernet-phy@0 { |
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126 | reg = <0>; |
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127 | phy-mode = "rgmii"; |
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128 | }; |
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129 | |||
130 | phy1: ethernet-phy@1 { |
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131 | reg = <1>; |
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132 | phy-mode = "rgmii"; |
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133 | }; |
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134 | |||
135 | phy2: ethernet-phy@2 { |
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136 | reg = <2>; |
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137 | phy-mode = "rgmii"; |
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138 | }; |
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139 | |||
140 | phy3: ethernet-phy@3 { |
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141 | reg = <3>; |
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142 | phy-mode = "rgmii"; |
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143 | }; |
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144 | |||
145 | phy4: ethernet-phy@4 { |
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146 | reg = <4>; |
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147 | phy-mode = "rgmii"; |
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148 | }; |
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149 | |||
150 | phy1f: ethernet-phy@1f { |
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151 | reg = <0x1f>; |
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152 | phy-mode = "rgmii"; |
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153 | }; |
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154 | }; |
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155 | }; |
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156 | |||
157 | &gsw { |
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158 | mediatek,port4 = "gmac"; |
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159 | }; |
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160 | |||
161 | &wmac { |
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162 | ralink,mtd-eeprom = <&factory 0>; |
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163 | }; |