OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "TPLINK-8M.dtsi" |
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4 | |||
5 | #include <dt-bindings/input/input.h> |
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6 | #include <dt-bindings/gpio/gpio.h> |
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7 | |||
8 | / { |
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9 | compatible = "tplink,c20-v4", "mediatek,mt7628an-soc"; |
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10 | model = "TP-Link Archer C20 v4"; |
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11 | |||
12 | aliases { |
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13 | led-boot = &led_power; |
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14 | led-failsafe = &led_power; |
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15 | led-running = &led_power; |
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16 | led-upgrade = &led_power; |
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17 | }; |
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18 | |||
19 | leds { |
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20 | compatible = "gpio-leds"; |
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21 | |||
22 | lan { |
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23 | label = "c20-v4:green:lan"; |
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24 | gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; |
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25 | }; |
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26 | |||
27 | led_power: power { |
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28 | label = "c20-v4:green:power"; |
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29 | gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; |
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30 | }; |
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31 | |||
32 | wan { |
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33 | label = "c20-v4:green:wan"; |
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34 | gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; |
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35 | }; |
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36 | |||
37 | wan_orange { |
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38 | label = "c20-v4:orange:wan"; |
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39 | gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; |
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40 | }; |
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41 | |||
42 | wlan5g { |
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43 | label = "c20-v4:green:wlan5g"; |
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44 | gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; |
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45 | }; |
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46 | |||
47 | wlan2g { |
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48 | label = "c20-v4:green:wlan2g"; |
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49 | gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; |
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50 | }; |
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51 | |||
52 | wps { |
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53 | label = "c20-v4:green:wps"; |
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54 | gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; |
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55 | }; |
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56 | }; |
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57 | |||
58 | keys { |
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59 | compatible = "gpio-keys-polled"; |
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60 | poll-interval = <20>; |
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61 | |||
62 | reset { |
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63 | label = "reset"; |
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64 | gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; |
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65 | linux,code = <KEY_RESTART>; |
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66 | }; |
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67 | |||
68 | rfkill { |
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69 | label = "rfkill"; |
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70 | gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; |
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71 | linux,code = <KEY_RFKILL>; |
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72 | }; |
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73 | }; |
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74 | }; |
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75 | |||
76 | &wmac { |
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77 | mtd-mac-address-increment = <(-2)>; |
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78 | }; |
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79 | |||
80 | ðernet { |
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81 | mediatek,portmap = "wllll"; |
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82 | }; |
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83 | |||
84 | &pinctrl { |
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85 | state_default: pinctrl0 { |
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86 | gpio { |
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87 | ralink,group = "i2s", "refclk", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "wdt"; |
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88 | ralink,function = "gpio"; |
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89 | }; |
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90 | }; |
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91 | }; |
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92 | |||
93 | &pcie { |
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94 | status = "okay"; |
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95 | }; |
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96 | |||
97 | &pcie0 { |
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98 | mt76@0,0 { |
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99 | reg = <0x0000 0 0 0 0>; |
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100 | mediatek,mtd-eeprom = <&factory 0x28000>; |
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101 | ieee80211-freq-limit = <5000000 6000000>; |
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102 | mtd-mac-address = <&factory 0xf100>; |
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103 | mtd-mac-address-increment = <(-1)>; |
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104 | }; |
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105 | }; |