OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "TPLINK-8M.dtsi" |
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4 | |||
5 | #include <dt-bindings/input/input.h> |
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6 | #include <dt-bindings/gpio/gpio.h> |
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7 | |||
8 | / { |
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9 | compatible = "tplink,c20-v4", "mediatek,mt7628an-soc"; |
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10 | model = "TP-Link Archer C20 v4"; |
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11 | |||
3 | office | 12 | gpio-leds { |
1 | office | 13 | compatible = "gpio-leds"; |
14 | |||
15 | lan { |
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16 | label = "c20-v4:green:lan"; |
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17 | gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; |
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18 | }; |
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19 | |||
3 | office | 20 | power { |
1 | office | 21 | label = "c20-v4:green:power"; |
22 | gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; |
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23 | }; |
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24 | |||
25 | wan { |
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26 | label = "c20-v4:green:wan"; |
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27 | gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; |
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28 | }; |
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29 | |||
30 | wan_orange { |
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31 | label = "c20-v4:orange:wan"; |
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32 | gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; |
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33 | }; |
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3 | office | 34 | |
1 | office | 35 | wlan5g { |
36 | label = "c20-v4:green:wlan5g"; |
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37 | gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; |
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38 | }; |
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39 | |||
40 | wlan2g { |
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41 | label = "c20-v4:green:wlan2g"; |
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42 | gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; |
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43 | }; |
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44 | |||
45 | wps { |
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46 | label = "c20-v4:green:wps"; |
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47 | gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; |
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48 | }; |
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49 | }; |
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50 | |||
3 | office | 51 | gpio-keys-polled { |
1 | office | 52 | compatible = "gpio-keys-polled"; |
3 | office | 53 | #address-cells = <1>; |
54 | #size-cells = <0>; |
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1 | office | 55 | poll-interval = <20>; |
56 | |||
57 | reset { |
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58 | label = "reset"; |
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59 | gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; |
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60 | linux,code = <KEY_RESTART>; |
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61 | }; |
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62 | |||
63 | rfkill { |
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64 | label = "rfkill"; |
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65 | gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; |
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66 | linux,code = <KEY_RFKILL>; |
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67 | }; |
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68 | }; |
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69 | }; |
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70 | |||
71 | &wmac { |
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72 | mtd-mac-address-increment = <(-2)>; |
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73 | }; |
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74 | |||
75 | ðernet { |
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76 | mediatek,portmap = "wllll"; |
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77 | }; |
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78 | |||
79 | &pinctrl { |
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80 | state_default: pinctrl0 { |
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81 | gpio { |
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82 | ralink,group = "i2s", "refclk", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "wdt"; |
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83 | ralink,function = "gpio"; |
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84 | }; |
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85 | }; |
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86 | }; |
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87 | |||
88 | &pcie { |
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89 | status = "okay"; |
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90 | |||
3 | office | 91 | pcie-bridge { |
92 | mt76@0,0 { |
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93 | reg = <0x0000 0 0 0 0>; |
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94 | device_type = "pci"; |
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95 | mediatek,mtd-eeprom = <&factory 0x28000>; |
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96 | ieee80211-freq-limit = <5000000 6000000>; |
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97 | mtd-mac-address = <&factory 0xf100>; |
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98 | mtd-mac-address-increment = <(-1)>; |
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99 | }; |
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1 | office | 100 | }; |
101 | }; |