OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * TP-Link TL-WDR4900 v1 Device Tree Source |
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3 | * |
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4 | * Copyright 2013 Gabor Juhos <juhosg@openwrt.org> |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License as published by the |
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8 | * Free Software Foundation; either version 2 of the License, or (at your |
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9 | * option) any later version. |
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10 | */ |
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11 | |||
12 | /include/ "fsl/p1010si-pre.dtsi" |
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13 | |||
14 | / { |
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15 | model = "TP-Link TL-WDR4900 v1"; |
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16 | compatible = "tplink,tl-wdr4900-v1"; |
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17 | |||
18 | chosen { |
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19 | bootargs = "console=ttyS0,115200"; |
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20 | /* |
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3 | office | 21 | linux,stdout-path = "/soc@ffe00000/serial@4500"; |
1 | office | 22 | */ |
23 | }; |
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24 | |||
25 | aliases { |
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26 | spi0 = &spi0; |
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27 | }; |
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28 | |||
29 | memory { |
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30 | device_type = "memory"; |
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31 | }; |
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32 | |||
33 | soc: soc@ffe00000 { |
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34 | ranges = <0x0 0x0 0xffe00000 0x100000>; |
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35 | |||
36 | spi0: spi@7000 { |
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37 | flash@0 { |
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3 | office | 38 | #address-cells = <1>; |
39 | #size-cells = <1>; |
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1 | office | 40 | compatible = "jedec,spi-nor"; |
41 | reg = <0>; |
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42 | spi-max-frequency = <25000000>; |
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43 | |||
3 | office | 44 | u-boot@0 { |
45 | reg = <0x0 0x0050000>; |
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46 | label = "u-boot"; |
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47 | read-only; |
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48 | }; |
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1 | office | 49 | |
3 | office | 50 | dtb@50000 { |
51 | reg = <0x00050000 0x00010000>; |
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52 | label = "dtb"; |
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53 | read-only; |
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54 | }; |
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1 | office | 55 | |
3 | office | 56 | kernel@60000 { |
57 | reg = <0x00060000 0x002a0000>; |
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58 | label = "kernel"; |
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59 | }; |
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1 | office | 60 | |
3 | office | 61 | rootfs@300000 { |
62 | reg = <0x00300000 0x00ce0000>; |
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63 | label = "rootfs"; |
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64 | }; |
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1 | office | 65 | |
3 | office | 66 | config: config@fe0000 { |
67 | reg = <0x00fe0000 0x00010000>; |
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68 | label = "config"; |
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69 | read-only; |
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70 | }; |
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1 | office | 71 | |
3 | office | 72 | caldata@ff0000 { |
73 | reg = <0x00ff0000 0x00010000>; |
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74 | label = "caldata"; |
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75 | read-only; |
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1 | office | 76 | }; |
3 | office | 77 | |
78 | firmware@60000 { |
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79 | reg = <0x00060000 0x00f80000>; |
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80 | label = "firmware"; |
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81 | }; |
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1 | office | 82 | }; |
83 | }; |
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84 | |||
85 | gpio0: gpio-controller@fc00 { |
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86 | }; |
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87 | |||
88 | usb@22000 { |
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89 | phy_type = "utmi"; |
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90 | dr_mode = "host"; |
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91 | }; |
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92 | |||
93 | mdio@24000 { |
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94 | phy0: ethernet-phy@0 { |
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95 | reg = <0x0>; |
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96 | qca,ar8327-initvals = < |
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97 | 0x00004 0x07600000 /* PAD0_MODE */ |
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98 | 0x00008 0x00000000 /* PAD5_MODE */ |
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99 | 0x0000c 0x01000000 /* PAD6_MODE */ |
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100 | 0x00010 0x40000000 /* POWER_ON_STRIP */ |
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101 | 0x00050 0xcf35cf35 /* LED_CTRL0 */ |
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102 | 0x00054 0xcf35cf35 /* LED_CTRL1 */ |
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103 | 0x00058 0xcf35cf35 /* LED_CTRL2 */ |
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104 | 0x0005c 0x03ffff00 /* LED_CTRL3 */ |
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105 | 0x0007c 0x0000007e /* PORT0_STATUS */ |
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106 | 0x00094 0x00000200 /* PORT6_STATUS */ |
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107 | >; |
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108 | }; |
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109 | }; |
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110 | |||
111 | mdio@25000 { |
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112 | status = "disabled"; |
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113 | }; |
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114 | |||
115 | mdio@26000 { |
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116 | status = "disabled"; |
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117 | }; |
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118 | |||
119 | enet0: ethernet@b0000 { |
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120 | phy-handle = <&phy0>; |
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121 | phy-connection-type = "rgmii-id"; |
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122 | mtd-mac-address = <&config 0x144>; |
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123 | }; |
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124 | |||
125 | enet1: ethernet@b1000 { |
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126 | status = "disabled"; |
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127 | }; |
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128 | |||
129 | enet2: ethernet@b2000 { |
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130 | status = "disabled"; |
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131 | }; |
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132 | |||
133 | sdhc@2e000 { |
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134 | status = "disabled"; |
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135 | }; |
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136 | |||
137 | serial1: serial@4600 { |
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138 | status = "disabled"; |
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139 | }; |
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140 | |||
141 | can0: can@1c000 { |
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142 | status = "disabled"; |
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143 | }; |
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144 | |||
145 | can1: can@1d000 { |
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146 | status = "disabled"; |
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147 | }; |
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148 | |||
149 | ptp_clock@b0e00 { |
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150 | compatible = "fsl,etsec-ptp"; |
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151 | reg = <0xb0e00 0xb0>; |
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152 | interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>; |
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153 | fsl,cksel = <1>; |
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154 | fsl,tclk-period = <5>; |
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155 | fsl,tmr-prsc = <2>; |
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156 | fsl,tmr-add = <0xcccccccd>; |
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157 | fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */ |
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158 | fsl,tmr-fiper2 = <0x00018696>; |
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159 | fsl,max-adj = <249999999>; |
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160 | }; |
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161 | }; |
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162 | |||
163 | pci0: pcie@ffe09000 { |
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164 | reg = <0 0xffe09000 0 0x1000>; |
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165 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 |
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166 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; |
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167 | pcie@0 { |
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168 | ranges = <0x2000000 0x0 0xa0000000 |
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169 | 0x2000000 0x0 0xa0000000 |
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170 | 0x0 0x20000000 |
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171 | |||
172 | 0x1000000 0x0 0x0 |
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173 | 0x1000000 0x0 0x0 |
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174 | 0x0 0x100000>; |
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175 | }; |
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176 | }; |
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177 | |||
178 | pci1: pcie@ffe0a000 { |
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179 | reg = <0 0xffe0a000 0 0x1000>; |
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180 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 |
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181 | 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; |
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182 | pcie@0 { |
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183 | ranges = <0x2000000 0x0 0x80000000 |
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184 | 0x2000000 0x0 0x80000000 |
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185 | 0x0 0x20000000 |
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186 | |||
187 | 0x1000000 0x0 0x0 |
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188 | 0x1000000 0x0 0x0 |
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189 | 0x0 0x100000>; |
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190 | }; |
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191 | }; |
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192 | |||
193 | ifc: ifc@ffe1e000 { |
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194 | status = "disabled"; |
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195 | }; |
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196 | |||
197 | leds { |
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198 | compatible = "gpio-leds"; |
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199 | |||
3 | office | 200 | system { |
1 | office | 201 | gpios = <&gpio0 2 1>; /* active low */ |
202 | label = "tp-link:blue:system"; |
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203 | }; |
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204 | |||
205 | usb1 { |
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206 | gpios = <&gpio0 3 1>; /* active low */ |
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207 | label = "tp-link:green:usb1"; |
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208 | }; |
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209 | |||
210 | usb2 { |
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211 | gpios = <&gpio0 4 1>; /* active low */ |
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212 | label = "tp-link:green:usb2"; |
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213 | }; |
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214 | |||
215 | usbpower { |
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216 | gpios = <&gpio0 10 1>; /* active low */ |
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217 | label = "tp-link:usb:power"; |
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218 | }; |
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219 | }; |
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220 | |||
221 | buttons { |
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222 | compatible = "gpio-keys"; |
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223 | |||
224 | reset { |
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225 | label = "Reset button"; |
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226 | gpios = <&gpio0 5 1>; /* active low */ |
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227 | linux,code = <0x198>; /* KEY_RESTART */ |
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228 | }; |
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229 | |||
230 | rfkill { |
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231 | label = "RFKILL switch"; |
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232 | gpios = <&gpio0 11 1>; /* active low */ |
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233 | linux,code = <0xf7>; /* RFKill */ |
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234 | }; |
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235 | }; |
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236 | }; |
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237 | |||
238 | /include/ "fsl/p1010si-post.dtsi" |
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239 | |||
240 | /* |
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241 | * The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely |
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242 | * related to the P1010. |
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243 | * |
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244 | * NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors" |
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245 | * datasheet states that the P1014 does not include the accelerated crypto |
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246 | * module (CAAM/SEC4) which is present in the P1010. |
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247 | * |
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248 | * NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the |
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249 | * SEC4 module, but states that SoCs with System Version Register values |
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250 | * 0x80F10110 or 0x80F10120 do not have the security feature. |
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251 | * |
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252 | * All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes |
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253 | * as: core rev 1.0, "P1014 (without security)". |
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254 | * |
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255 | * The SVR value is reported by uboot on the serial console. |
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256 | */ |
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257 | |||
258 | / { |
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259 | soc: soc@ffe00000 { |
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260 | /delete-node/ crypto@30000; /* Pulled in by p1010si-post */ |
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261 | }; |
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262 | }; |