OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Aerohive HiveAP-330 Device Tree Source |
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3 | * |
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4 | * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com> |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License as published by the |
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8 | * Free Software Foundation; either version 2 of the License, or (at your |
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9 | * option) any later version. |
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10 | */ |
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11 | |||
12 | /include/ "fsl/p1020si-pre.dtsi" |
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13 | / { |
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14 | model = "Aerohive HiveAP-330"; |
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15 | compatible = "aerohive,hiveap-330"; |
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16 | |||
17 | chosen { |
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18 | bootargs-override = "console=ttyS0,9600"; |
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19 | }; |
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20 | |||
21 | memory { |
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22 | device_type = "memory"; |
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23 | }; |
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24 | |||
25 | board_lbc: lbc: localbus@ffe05000 { |
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26 | reg = <0 0xffe05000 0 0x1000>; |
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27 | ranges = <0x0 0x0 0x0 0xec000000 0x4000000>; |
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28 | |||
29 | nor@0,0 { |
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30 | #address-cells = <1>; |
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31 | #size-cells = <1>; |
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32 | compatible = "cfi-flash"; |
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33 | reg = <0x0 0x0 0x4000000>; |
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34 | bank-width = <2>; |
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35 | device-width = <1>; |
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36 | |||
37 | partition@0 { |
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38 | reg = <0x0 0x40000>; |
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39 | label = "dtb"; |
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40 | }; |
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41 | |||
42 | partition@40000 { |
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43 | reg = <0x40000 0x40000>; |
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44 | label = "initrd"; |
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45 | }; |
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46 | |||
47 | partition@80000 { |
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48 | reg = <0x80000 0x27c0000>; |
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49 | label = "rootfs"; |
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50 | }; |
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51 | |||
52 | partition@2840000 { |
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53 | reg = <0x2840000 0x800000>; |
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54 | label = "kernel"; |
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55 | }; |
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56 | |||
57 | partition@3040000 { |
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58 | reg = <0x3040000 0xec0000>; |
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59 | label = "stock-jffs2"; |
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60 | read-only; |
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61 | }; |
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62 | |||
63 | hwinfo: partition@3f00000 { |
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64 | reg = <0x3f00000 0x20000>; |
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65 | label = "hw-info"; |
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66 | read-only; |
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67 | }; |
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68 | |||
69 | partition@3f20000 { |
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70 | reg = <0x3f20000 0x20000>; |
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71 | label = "boot-info"; |
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72 | read-only; |
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73 | }; |
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74 | |||
75 | partition@3f40000 { |
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76 | reg = <0x3f40000 0x20000>; |
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77 | label = "boot-info-backup"; |
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78 | read-only; |
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79 | }; |
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80 | |||
81 | partition@3f60000 { |
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82 | reg = <0x3f60000 0x20000>; |
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83 | label = "u-boot-env"; |
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84 | }; |
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85 | |||
86 | partition@3f80000 { |
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87 | reg = <0x3f80000 0x80000>; |
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88 | label = "u-boot"; |
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89 | read-only; |
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90 | }; |
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91 | |||
92 | firmware@0 { |
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93 | reg = <0x0 0x3040000>; |
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94 | label = "firmware"; |
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95 | }; |
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96 | }; |
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97 | }; |
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98 | |||
99 | board_soc: soc: soc@ffe00000 { |
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100 | ranges = <0x0 0x0 0xffe00000 0x100000>; |
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101 | |||
102 | i2c@3100 { |
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103 | tpm@29 { |
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104 | compatible = "atmel,at97sc3204t"; |
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105 | reg = <0x29>; |
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106 | }; |
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107 | |||
108 | lp5521@32 { |
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109 | compatible = "national,lp5521"; |
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110 | reg = <0x32>; |
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111 | clock-mode = /bits/ 8 <2>; |
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3 | office | 112 | chan0 { |
1 | office | 113 | chan-name = "hiveap-330:red:tricolor0"; |
114 | led-cur = /bits/ 8 <0x2f>; |
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115 | max-cur = /bits/ 8 <0x5f>; |
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116 | }; |
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3 | office | 117 | chan1 { |
1 | office | 118 | chan-name = "hiveap-330:green:tricolor0"; |
119 | led-cur = /bits/ 8 <0x2f>; |
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120 | max-cur = /bits/ 8 <0x5f>; |
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121 | }; |
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122 | chan2 { |
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123 | chan-name = "hiveap-330:blue:tricolor0"; |
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124 | led-cur = /bits/ 8 <0x2f>; |
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125 | max-cur = /bits/ 8 <0x5f>; |
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126 | }; |
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127 | }; |
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128 | |||
129 | /* Most likely SoC boot config */ |
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130 | eeprom@51 { |
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131 | compatible = "eeprom"; |
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132 | reg = <0x51>; |
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133 | }; |
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134 | }; |
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135 | |||
136 | mdio@24000 { |
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137 | phy0: ethernet-phy@0 { |
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138 | interrupts = <3 1 0 0>; |
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139 | reg = <0x1>; |
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140 | }; |
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141 | |||
142 | phy1: ethernet-phy@1 { |
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143 | interrupts = <2 1 0 0>; |
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144 | reg = <0x2>; |
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145 | }; |
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146 | }; |
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147 | |||
148 | mdio@25000 { |
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149 | status = "disabled"; |
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150 | }; |
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151 | |||
152 | mdio@26000 { |
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153 | status = "disabled"; |
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154 | }; |
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155 | |||
156 | enet0: ethernet@b0000 { |
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157 | status = "okay"; |
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158 | phy-handle = <&phy0>; |
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159 | phy-connection-type = "rgmii-id"; |
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160 | mtd-mac-address = <&hwinfo 0>; |
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161 | }; |
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162 | |||
163 | enet1: ethernet@b1000 { |
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164 | status = "disabled"; |
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165 | }; |
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166 | |||
167 | enet2: ethernet@b2000 { |
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168 | status = "okay"; |
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169 | phy-handle = <&phy1>; |
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170 | phy-connection-type = "rgmii-id"; |
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171 | mtd-mac-address = <&hwinfo 0>; |
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172 | mtd-mac-address-increment = <1>; |
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173 | }; |
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174 | |||
175 | gpio0: gpio-controller@fc00 { |
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176 | }; |
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177 | |||
178 | usb@22000 { |
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179 | phy_type = "ulpi"; |
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180 | dr_mode = "host"; |
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181 | }; |
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182 | |||
183 | usb@23000 { |
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184 | status = "disabled"; |
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185 | }; |
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186 | }; |
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187 | |||
188 | pci0: pcie@ffe09000 { |
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189 | reg = <0x0 0xffe09000 0x0 0x1000>; |
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190 | ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000 |
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191 | 0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>; |
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192 | pcie@0 { |
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193 | ranges = <0x2000000 0x0 0xa0000000 |
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194 | 0x2000000 0x0 0xa0000000 |
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195 | 0x0 0x20000000 |
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196 | |||
197 | 0x1000000 0x0 0x0 |
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198 | 0x1000000 0x0 0x0 |
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199 | 0x0 0x100000>; |
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200 | }; |
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201 | }; |
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202 | |||
203 | pci1: pcie@ffe0a000 { |
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204 | reg = <0x0 0xffe0a000 0x0 0x1000>; |
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205 | ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000 |
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206 | 0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>; |
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207 | pcie@0 { |
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208 | ranges = <0x2000000 0x0 0xc0000000 |
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209 | 0x2000000 0x0 0xc0000000 |
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210 | 0x0 0x20000000 |
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211 | |||
212 | 0x1000000 0x0 0x0 |
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213 | 0x1000000 0x0 0x0 |
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214 | 0x0 0x100000>; |
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215 | }; |
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216 | }; |
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217 | |||
218 | buttons { |
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219 | compatible = "gpio-keys"; |
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220 | |||
221 | reset { |
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222 | label = "Reset button"; |
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223 | gpios = <&gpio0 8 1>; /* active low */ |
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224 | linux,code = <0x198>; /* KEY_RESTART */ |
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225 | }; |
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226 | }; |
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227 | }; |
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228 | /include/ "fsl/p1020si-post.dtsi" |