OpenWrt – Blame information for rev 2
?pathlinks?
Rev | Author | Line No. | Line |
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1 | office | 1 | From 05375244c8e74f90239db92646a771905fdfc0db Mon Sep 17 00:00:00 2001 |
2 | From: Biwen Li <biwen.li@nxp.com> |
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3 | Date: Tue, 30 Oct 2018 18:28:22 +0800 |
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4 | Subject: [PATCH 38/40] smmu: support layerscape |
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5 | This is an integrated patch of smmu for layerscape |
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6 | |||
7 | Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> |
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8 | Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> |
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9 | Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> |
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10 | Signed-off-by: Biwen Li <biwen.li@nxp.com> |
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11 | --- |
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12 | .../devicetree/bindings/misc/fsl,qoriq-mc.txt | 39 ++++++ |
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13 | drivers/iommu/arm-smmu.c | 7 + |
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14 | drivers/iommu/iommu.c | 21 +++ |
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15 | drivers/iommu/of_iommu.c | 126 +++++++++++++++++- |
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16 | drivers/of/irq.c | 6 +- |
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17 | drivers/of/of_pci.c | 101 -------------- |
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18 | include/linux/iommu.h | 2 + |
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19 | include/linux/of_iommu.h | 10 ++ |
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20 | include/linux/of_pci.h | 10 -- |
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21 | 9 files changed, 205 insertions(+), 117 deletions(-) |
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22 | |||
23 | --- a/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt |
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24 | +++ b/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt |
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25 | @@ -9,6 +9,25 @@ blocks that can be used to create functi |
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26 | such as network interfaces, crypto accelerator instances, L2 switches, |
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27 | etc. |
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28 | |||
29 | +For an overview of the DPAA2 architecture and fsl-mc bus see: |
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30 | +drivers/staging/fsl-mc/README.txt |
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31 | + |
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32 | +As described in the above overview, all DPAA2 objects in a DPRC share the |
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33 | +same hardware "isolation context" and a 10-bit value called an ICID |
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34 | +(isolation context id) is expressed by the hardware to identify |
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35 | +the requester. |
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36 | + |
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37 | +The generic 'iommus' property is insufficient to describe the relationship |
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38 | +between ICIDs and IOMMUs, so an iommu-map property is used to define |
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39 | +the set of possible ICIDs under a root DPRC and how they map to |
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40 | +an IOMMU. |
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41 | + |
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42 | +For generic IOMMU bindings, see |
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43 | +Documentation/devicetree/bindings/iommu/iommu.txt. |
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44 | + |
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45 | +For arm-smmu binding, see: |
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46 | +Documentation/devicetree/bindings/iommu/arm,smmu.txt. |
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47 | + |
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48 | Required properties: |
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49 | |||
50 | - compatible |
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51 | @@ -88,14 +107,34 @@ Sub-nodes: |
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52 | Value type: <phandle> |
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53 | Definition: Specifies the phandle to the PHY device node associated |
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54 | with the this dpmac. |
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55 | +Optional properties: |
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56 | + |
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57 | +- iommu-map: Maps an ICID to an IOMMU and associated iommu-specifier |
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58 | + data. |
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59 | + |
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60 | + The property is an arbitrary number of tuples of |
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61 | + (icid-base,iommu,iommu-base,length). |
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62 | + |
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63 | + Any ICID i in the interval [icid-base, icid-base + length) is |
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64 | + associated with the listed IOMMU, with the iommu-specifier |
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65 | + (i - icid-base + iommu-base). |
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66 | |||
67 | Example: |
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68 | |||
69 | + smmu: iommu@5000000 { |
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70 | + compatible = "arm,mmu-500"; |
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71 | + #iommu-cells = <2>; |
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72 | + stream-match-mask = <0x7C00>; |
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73 | + ... |
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74 | + }; |
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75 | + |
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76 | fsl_mc: fsl-mc@80c000000 { |
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77 | compatible = "fsl,qoriq-mc"; |
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78 | reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ |
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79 | <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ |
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80 | msi-parent = <&its>; |
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81 | + /* define map for ICIDs 23-64 */ |
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82 | + iommu-map = <23 &smmu 23 41>; |
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83 | #address-cells = <3>; |
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84 | #size-cells = <1>; |
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85 | |||
86 | --- a/drivers/iommu/arm-smmu.c |
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87 | +++ b/drivers/iommu/arm-smmu.c |
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88 | @@ -52,6 +52,7 @@ |
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89 | #include <linux/spinlock.h> |
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90 | |||
91 | #include <linux/amba/bus.h> |
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92 | +#include <linux/fsl/mc.h> |
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93 | |||
94 | #include "io-pgtable.h" |
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95 | #include "arm-smmu-regs.h" |
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96 | @@ -1465,6 +1466,8 @@ static struct iommu_group *arm_smmu_devi |
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97 | |||
98 | if (dev_is_pci(dev)) |
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99 | group = pci_device_group(dev); |
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100 | + else if (dev_is_fsl_mc(dev)) |
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101 | + group = fsl_mc_device_group(dev); |
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102 | else |
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103 | group = generic_device_group(dev); |
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104 | |||
105 | @@ -2043,6 +2046,10 @@ static void arm_smmu_bus_init(void) |
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106 | bus_set_iommu(&pci_bus_type, &arm_smmu_ops); |
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107 | } |
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108 | #endif |
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109 | +#ifdef CONFIG_FSL_MC_BUS |
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110 | + if (!iommu_present(&fsl_mc_bus_type)) |
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111 | + bus_set_iommu(&fsl_mc_bus_type, &arm_smmu_ops); |
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112 | +#endif |
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113 | } |
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114 | |||
115 | static int arm_smmu_device_probe(struct platform_device *pdev) |
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116 | --- a/drivers/iommu/iommu.c |
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117 | +++ b/drivers/iommu/iommu.c |
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118 | @@ -33,6 +33,7 @@ |
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119 | #include <linux/bitops.h> |
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120 | #include <linux/property.h> |
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121 | #include <trace/events/iommu.h> |
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122 | +#include <linux/fsl/mc.h> |
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123 | |||
124 | static struct kset *iommu_group_kset; |
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125 | static DEFINE_IDA(iommu_group_ida); |
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126 | @@ -987,6 +988,26 @@ struct iommu_group *pci_device_group(str |
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127 | return iommu_group_alloc(); |
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128 | } |
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129 | |||
130 | +/* Get the IOMMU group for device on fsl-mc bus */ |
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131 | +struct iommu_group *fsl_mc_device_group(struct device *dev) |
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132 | +{ |
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133 | + struct device *cont_dev = fsl_mc_cont_dev(dev); |
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134 | + struct iommu_group *group; |
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135 | + |
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136 | + /* Container device is responsible for creating the iommu group */ |
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137 | + if (fsl_mc_is_cont_dev(dev)) { |
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138 | + group = iommu_group_alloc(); |
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139 | + if (IS_ERR(group)) |
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140 | + return NULL; |
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141 | + } else { |
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142 | + get_device(cont_dev); |
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143 | + group = iommu_group_get(cont_dev); |
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144 | + put_device(cont_dev); |
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145 | + } |
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146 | + |
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147 | + return group; |
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148 | +} |
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149 | + |
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150 | /** |
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151 | * iommu_group_get_for_dev - Find or create the IOMMU group for a device |
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152 | * @dev: target device |
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153 | --- a/drivers/iommu/of_iommu.c |
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154 | +++ b/drivers/iommu/of_iommu.c |
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155 | @@ -24,6 +24,7 @@ |
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156 | #include <linux/of_iommu.h> |
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157 | #include <linux/of_pci.h> |
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158 | #include <linux/slab.h> |
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159 | +#include <linux/fsl/mc.h> |
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160 | |||
161 | #define NO_IOMMU 1 |
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162 | |||
163 | @@ -143,15 +144,115 @@ struct of_pci_iommu_alias_info { |
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164 | struct device_node *np; |
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165 | }; |
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166 | |||
167 | +/** |
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168 | + * of_map_rid - Translate a requester ID through a downstream mapping. |
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169 | + * @np: root complex device node. |
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170 | + * @rid: Requester ID to map. |
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171 | + * @map_name: property name of the map to use. |
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172 | + * @map_mask_name: optional property name of the mask to use. |
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173 | + * @target: optional pointer to a target device node. |
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174 | + * @id_out: optional pointer to receive the translated ID. |
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175 | + * |
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176 | + * Given PCI/MC requester ID, look up the appropriate implementation-defined |
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177 | + * platform ID and/or the target device which receives transactions on that |
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178 | + * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or |
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179 | + * @id_out may be NULL if only the other is required. If @target points to |
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180 | + * a non-NULL device node pointer, only entries targeting that node will be |
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181 | + * matched; if it points to a NULL value, it will receive the device node of |
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182 | + * the first matching target phandle, with a reference held. |
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183 | + * |
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184 | + * Return: 0 on success or a standard error code on failure. |
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185 | + */ |
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186 | +int of_map_rid(struct device_node *np, u32 rid, |
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187 | + const char *map_name, const char *map_mask_name, |
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188 | + struct device_node **target, u32 *id_out) |
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189 | +{ |
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190 | + u32 map_mask, masked_rid; |
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191 | + int map_len; |
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192 | + const __be32 *map = NULL; |
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193 | + |
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194 | + if (!np || !map_name || (!target && !id_out)) |
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195 | + return -EINVAL; |
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196 | + |
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197 | + map = of_get_property(np, map_name, &map_len); |
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198 | + if (!map) { |
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199 | + if (target) |
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200 | + return -ENODEV; |
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201 | + /* Otherwise, no map implies no translation */ |
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202 | + *id_out = rid; |
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203 | + return 0; |
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204 | + } |
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205 | + |
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206 | + if (!map_len || map_len % (4 * sizeof(*map))) { |
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207 | + pr_err("%pOF: Error: Bad %s length: %d\n", np, |
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208 | + map_name, map_len); |
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209 | + return -EINVAL; |
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210 | + } |
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211 | + |
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212 | + /* The default is to select all bits. */ |
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213 | + map_mask = 0xffffffff; |
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214 | + |
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215 | + /* |
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216 | + * Can be overridden by "{iommu,msi}-map-mask" property. |
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217 | + * If of_property_read_u32() fails, the default is used. |
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218 | + */ |
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219 | + if (map_mask_name) |
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220 | + of_property_read_u32(np, map_mask_name, &map_mask); |
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221 | + |
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222 | + masked_rid = map_mask & rid; |
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223 | + for ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) { |
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224 | + struct device_node *phandle_node; |
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225 | + u32 rid_base = be32_to_cpup(map + 0); |
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226 | + u32 phandle = be32_to_cpup(map + 1); |
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227 | + u32 out_base = be32_to_cpup(map + 2); |
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228 | + u32 rid_len = be32_to_cpup(map + 3); |
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229 | + |
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230 | + if (rid_base & ~map_mask) { |
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231 | + pr_err("%pOF: Invalid %s translation - %s-mask (0x%x) ignores rid-base (0x%x)\n", |
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232 | + np, map_name, map_name, |
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233 | + map_mask, rid_base); |
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234 | + return -EFAULT; |
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235 | + } |
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236 | + |
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237 | + if (masked_rid < rid_base || masked_rid >= rid_base + rid_len) |
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238 | + continue; |
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239 | + |
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240 | + phandle_node = of_find_node_by_phandle(phandle); |
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241 | + if (!phandle_node) |
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242 | + return -ENODEV; |
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243 | + |
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244 | + if (target) { |
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245 | + if (*target) |
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246 | + of_node_put(phandle_node); |
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247 | + else |
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248 | + *target = phandle_node; |
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249 | + |
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250 | + if (*target != phandle_node) |
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251 | + continue; |
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252 | + } |
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253 | + |
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254 | + if (id_out) |
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255 | + *id_out = masked_rid - rid_base + out_base; |
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256 | + |
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257 | + pr_debug("%pOF: %s, using mask %08x, rid-base: %08x, out-base: %08x, length: %08x, rid: %08x -> %08x\n", |
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258 | + np, map_name, map_mask, rid_base, out_base, |
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259 | + rid_len, rid, *id_out); |
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260 | + return 0; |
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261 | + } |
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262 | + |
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263 | + pr_err("%pOF: Invalid %s translation - no match for rid 0x%x on %pOF\n", |
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264 | + np, map_name, rid, target && *target ? *target : NULL); |
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265 | + return -EFAULT; |
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266 | +} |
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267 | static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data) |
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268 | { |
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269 | struct of_pci_iommu_alias_info *info = data; |
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270 | struct of_phandle_args iommu_spec = { .args_count = 1 }; |
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271 | int err; |
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272 | |||
273 | - err = of_pci_map_rid(info->np, alias, "iommu-map", |
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274 | - "iommu-map-mask", &iommu_spec.np, |
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275 | - iommu_spec.args); |
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276 | + err = of_map_rid(info->np, alias, "iommu-map", |
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277 | + "iommu-map-mask", &iommu_spec.np, |
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278 | + iommu_spec.args); |
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279 | if (err) |
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280 | return err == -ENODEV ? NO_IOMMU : err; |
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281 | |||
282 | @@ -160,6 +261,23 @@ static int of_pci_iommu_init(struct pci_ |
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283 | return err; |
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284 | } |
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285 | |||
286 | +static int of_fsl_mc_iommu_init(struct fsl_mc_device *mc_dev, |
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287 | + struct device_node *master_np) |
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288 | +{ |
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289 | + struct of_phandle_args iommu_spec = { .args_count = 1 }; |
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290 | + int err; |
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291 | + |
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292 | + err = of_map_rid(master_np, mc_dev->icid, "iommu-map", |
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293 | + "iommu-map-mask", &iommu_spec.np, |
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294 | + iommu_spec.args); |
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295 | + if (err) |
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296 | + return err == -ENODEV ? NO_IOMMU : err; |
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297 | + |
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298 | + err = of_iommu_xlate(&mc_dev->dev, &iommu_spec); |
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299 | + of_node_put(iommu_spec.np); |
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300 | + return err; |
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301 | +} |
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302 | + |
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303 | const struct iommu_ops *of_iommu_configure(struct device *dev, |
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304 | struct device_node *master_np) |
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305 | { |
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306 | @@ -191,6 +309,8 @@ const struct iommu_ops *of_iommu_configu |
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307 | |||
308 | err = pci_for_each_dma_alias(to_pci_dev(dev), |
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309 | of_pci_iommu_init, &info); |
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310 | + } else if (dev_is_fsl_mc(dev)) { |
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311 | + err = of_fsl_mc_iommu_init(to_fsl_mc_device(dev), master_np); |
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312 | } else { |
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313 | struct of_phandle_args iommu_spec; |
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314 | int idx = 0; |
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315 | --- a/drivers/of/irq.c |
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316 | +++ b/drivers/of/irq.c |
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317 | @@ -26,7 +26,7 @@ |
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318 | #include <linux/module.h> |
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319 | #include <linux/of.h> |
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320 | #include <linux/of_irq.h> |
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321 | -#include <linux/of_pci.h> |
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322 | +#include <linux/of_iommu.h> |
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323 | #include <linux/string.h> |
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324 | #include <linux/slab.h> |
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325 | |||
326 | @@ -593,8 +593,8 @@ static u32 __of_msi_map_rid(struct devic |
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327 | * "msi-map" property. |
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328 | */ |
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329 | for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent) |
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330 | - if (!of_pci_map_rid(parent_dev->of_node, rid_in, "msi-map", |
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331 | - "msi-map-mask", np, &rid_out)) |
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332 | + if (!of_map_rid(parent_dev->of_node, rid_in, "msi-map", |
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333 | + "msi-map-mask", np, &rid_out)) |
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334 | break; |
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335 | return rid_out; |
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336 | } |
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337 | --- a/drivers/of/of_pci.c |
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338 | +++ b/drivers/of/of_pci.c |
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339 | @@ -281,104 +281,3 @@ parse_failed: |
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340 | } |
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341 | EXPORT_SYMBOL_GPL(of_pci_get_host_bridge_resources); |
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342 | #endif /* CONFIG_OF_ADDRESS */ |
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343 | - |
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344 | -/** |
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345 | - * of_pci_map_rid - Translate a requester ID through a downstream mapping. |
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346 | - * @np: root complex device node. |
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347 | - * @rid: PCI requester ID to map. |
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348 | - * @map_name: property name of the map to use. |
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349 | - * @map_mask_name: optional property name of the mask to use. |
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350 | - * @target: optional pointer to a target device node. |
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351 | - * @id_out: optional pointer to receive the translated ID. |
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352 | - * |
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353 | - * Given a PCI requester ID, look up the appropriate implementation-defined |
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354 | - * platform ID and/or the target device which receives transactions on that |
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355 | - * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or |
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356 | - * @id_out may be NULL if only the other is required. If @target points to |
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357 | - * a non-NULL device node pointer, only entries targeting that node will be |
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358 | - * matched; if it points to a NULL value, it will receive the device node of |
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359 | - * the first matching target phandle, with a reference held. |
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360 | - * |
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361 | - * Return: 0 on success or a standard error code on failure. |
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362 | - */ |
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363 | -int of_pci_map_rid(struct device_node *np, u32 rid, |
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364 | - const char *map_name, const char *map_mask_name, |
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365 | - struct device_node **target, u32 *id_out) |
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366 | -{ |
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367 | - u32 map_mask, masked_rid; |
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368 | - int map_len; |
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369 | - const __be32 *map = NULL; |
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370 | - |
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371 | - if (!np || !map_name || (!target && !id_out)) |
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372 | - return -EINVAL; |
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373 | - |
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374 | - map = of_get_property(np, map_name, &map_len); |
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375 | - if (!map) { |
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376 | - if (target) |
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377 | - return -ENODEV; |
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378 | - /* Otherwise, no map implies no translation */ |
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379 | - *id_out = rid; |
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380 | - return 0; |
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381 | - } |
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382 | - |
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383 | - if (!map_len || map_len % (4 * sizeof(*map))) { |
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384 | - pr_err("%pOF: Error: Bad %s length: %d\n", np, |
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385 | - map_name, map_len); |
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386 | - return -EINVAL; |
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387 | - } |
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388 | - |
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389 | - /* The default is to select all bits. */ |
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390 | - map_mask = 0xffffffff; |
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391 | - |
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392 | - /* |
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393 | - * Can be overridden by "{iommu,msi}-map-mask" property. |
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394 | - * If of_property_read_u32() fails, the default is used. |
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395 | - */ |
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396 | - if (map_mask_name) |
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397 | - of_property_read_u32(np, map_mask_name, &map_mask); |
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398 | - |
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399 | - masked_rid = map_mask & rid; |
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400 | - for ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) { |
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401 | - struct device_node *phandle_node; |
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402 | - u32 rid_base = be32_to_cpup(map + 0); |
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403 | - u32 phandle = be32_to_cpup(map + 1); |
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404 | - u32 out_base = be32_to_cpup(map + 2); |
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405 | - u32 rid_len = be32_to_cpup(map + 3); |
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406 | - |
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407 | - if (rid_base & ~map_mask) { |
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408 | - pr_err("%pOF: Invalid %s translation - %s-mask (0x%x) ignores rid-base (0x%x)\n", |
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409 | - np, map_name, map_name, |
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410 | - map_mask, rid_base); |
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411 | - return -EFAULT; |
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412 | - } |
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413 | - |
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414 | - if (masked_rid < rid_base || masked_rid >= rid_base + rid_len) |
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415 | - continue; |
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416 | - |
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417 | - phandle_node = of_find_node_by_phandle(phandle); |
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418 | - if (!phandle_node) |
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419 | - return -ENODEV; |
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420 | - |
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421 | - if (target) { |
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422 | - if (*target) |
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423 | - of_node_put(phandle_node); |
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424 | - else |
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425 | - *target = phandle_node; |
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426 | - |
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427 | - if (*target != phandle_node) |
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428 | - continue; |
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429 | - } |
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430 | - |
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431 | - if (id_out) |
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432 | - *id_out = masked_rid - rid_base + out_base; |
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433 | - |
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434 | - pr_debug("%pOF: %s, using mask %08x, rid-base: %08x, out-base: %08x, length: %08x, rid: %08x -> %08x\n", |
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435 | - np, map_name, map_mask, rid_base, out_base, |
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436 | - rid_len, rid, *id_out); |
||
437 | - return 0; |
||
438 | - } |
||
439 | - |
||
440 | - pr_err("%pOF: Invalid %s translation - no match for rid 0x%x on %pOF\n", |
||
441 | - np, map_name, rid, target && *target ? *target : NULL); |
||
442 | - return -EFAULT; |
||
443 | -} |
||
444 | --- a/include/linux/iommu.h |
||
445 | +++ b/include/linux/iommu.h |
||
446 | @@ -389,6 +389,8 @@ static inline size_t iommu_map_sg(struct |
||
447 | extern struct iommu_group *pci_device_group(struct device *dev); |
||
448 | /* Generic device grouping function */ |
||
449 | extern struct iommu_group *generic_device_group(struct device *dev); |
||
450 | +/* FSL-MC device grouping function */ |
||
451 | +struct iommu_group *fsl_mc_device_group(struct device *dev); |
||
452 | |||
453 | /** |
||
454 | * struct iommu_fwspec - per-device IOMMU instance data |
||
455 | --- a/include/linux/of_iommu.h |
||
456 | +++ b/include/linux/of_iommu.h |
||
457 | @@ -15,6 +15,9 @@ extern int of_get_dma_window(struct devi |
||
458 | extern const struct iommu_ops *of_iommu_configure(struct device *dev, |
||
459 | struct device_node *master_np); |
||
460 | |||
461 | +int of_map_rid(struct device_node *np, u32 rid, |
||
462 | + const char *map_name, const char *map_mask_name, |
||
463 | + struct device_node **target, u32 *id_out); |
||
464 | #else |
||
465 | |||
466 | static inline int of_get_dma_window(struct device_node *dn, const char *prefix, |
||
467 | @@ -30,6 +33,13 @@ static inline const struct iommu_ops *of |
||
468 | return NULL; |
||
469 | } |
||
470 | |||
471 | +static inline int of_map_rid(struct device_node *np, u32 rid, |
||
472 | + const char *map_name, const char *map_mask_name, |
||
473 | + struct device_node **target, u32 *id_out) |
||
474 | +{ |
||
475 | + return -EINVAL; |
||
476 | +} |
||
477 | + |
||
478 | #endif /* CONFIG_OF_IOMMU */ |
||
479 | |||
480 | extern struct of_device_id __iommu_of_table; |
||
481 | --- a/include/linux/of_pci.h |
||
482 | +++ b/include/linux/of_pci.h |
||
483 | @@ -19,9 +19,6 @@ int of_pci_parse_bus_range(struct device |
||
484 | int of_get_pci_domain_nr(struct device_node *node); |
||
485 | int of_pci_get_max_link_speed(struct device_node *node); |
||
486 | void of_pci_check_probe_only(void); |
||
487 | -int of_pci_map_rid(struct device_node *np, u32 rid, |
||
488 | - const char *map_name, const char *map_mask_name, |
||
489 | - struct device_node **target, u32 *id_out); |
||
490 | #else |
||
491 | static inline int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq) |
||
492 | { |
||
493 | @@ -57,13 +54,6 @@ of_get_pci_domain_nr(struct device_node |
||
494 | return -1; |
||
495 | } |
||
496 | |||
497 | -static inline int of_pci_map_rid(struct device_node *np, u32 rid, |
||
498 | - const char *map_name, const char *map_mask_name, |
||
499 | - struct device_node **target, u32 *id_out) |
||
500 | -{ |
||
501 | - return -EINVAL; |
||
502 | -} |
||
503 | - |
||
504 | static inline int |
||
505 | of_pci_get_max_link_speed(struct device_node *node) |
||
506 | { |