OpenWrt – Blame information for rev 1

Subversion Repositories:
Rev:
Rev Author Line No. Line
1 office 1 From d94f8863307c0f7fb7aeb2084cc666c47991d78b Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Mon, 19 Nov 2018 10:26:57 +0800
4 Subject: [PATCH] clock: support layerscape
5 This is an integrated patch of clock for layerscape
6  
7 Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
8 Signed-off-by: Biwen Li <biwen.li@nxp.com>
9 ---
10 drivers/clk/clk-qoriq.c | 9 ++++++++-
11 1 file changed, 8 insertions(+), 1 deletion(-)
12  
13 --- a/drivers/clk/clk-qoriq.c
14 +++ b/drivers/clk/clk-qoriq.c
15 @@ -41,7 +41,7 @@ struct clockgen_pll_div {
16 };
17  
18 struct clockgen_pll {
19 - struct clockgen_pll_div div[4];
20 + struct clockgen_pll_div div[8];
21 };
22  
23 #define CLKSEL_VALID 1
24 @@ -1127,6 +1127,13 @@ static void __init create_one_pll(struct
25 struct clk *clk;
26 int ret;
27  
28 + /*
29 + * For platform PLL, there are 8 divider clocks.
30 + * For core PLL, there are 4 divider clocks at most.
31 + */
32 + if (idx != 0 && i >= 4)
33 + break;
34 +
35 snprintf(pll->div[i].name, sizeof(pll->div[i].name),
36 "cg-pll%d-div%d", idx, i + 1);
37