OpenWrt – Blame information for rev 1

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1 office 1 From 579f1f6767b1008c6e5ccc2b029acbb56002ed8b Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Tue, 30 Oct 2018 18:26:20 +0800
4 Subject: [PATCH 11/40] dpaa2-rtc: support layerscape
5 This is an integrated patch of dpaa2-rtc for layerscape
6  
7 Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
8 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
9 Signed-off-by: Biwen Li <biwen.li@nxp.com>
10 ---
11 drivers/staging/fsl-dpaa2/rtc/Makefile | 10 +
12 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h | 160 +++++
13 drivers/staging/fsl-dpaa2/rtc/dprtc.c | 746 ++++++++++++++++++++++
14 drivers/staging/fsl-dpaa2/rtc/dprtc.h | 172 +++++
15 drivers/staging/fsl-dpaa2/rtc/rtc.c | 242 +++++++
16 5 files changed, 1330 insertions(+)
17 create mode 100644 drivers/staging/fsl-dpaa2/rtc/Makefile
18 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
19 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.c
20 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.h
21 create mode 100644 drivers/staging/fsl-dpaa2/rtc/rtc.c
22  
23 --- /dev/null
24 +++ b/drivers/staging/fsl-dpaa2/rtc/Makefile
25 @@ -0,0 +1,10 @@
26 +
27 +obj-$(CONFIG_PTP_1588_CLOCK_DPAA2) += dpaa2-rtc.o
28 +
29 +dpaa2-rtc-objs := rtc.o dprtc.o
30 +
31 +all:
32 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
33 +
34 +clean:
35 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
36 --- /dev/null
37 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
38 @@ -0,0 +1,160 @@
39 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
40 + *
41 + * Redistribution and use in source and binary forms, with or without
42 + * modification, are permitted provided that the following conditions are met:
43 + * * Redistributions of source code must retain the above copyright
44 + * notice, this list of conditions and the following disclaimer.
45 + * * Redistributions in binary form must reproduce the above copyright
46 + * notice, this list of conditions and the following disclaimer in the
47 + * documentation and/or other materials provided with the distribution.
48 + * * Neither the name of the above-listed copyright holders nor the
49 + * names of any contributors may be used to endorse or promote products
50 + * derived from this software without specific prior written permission.
51 + *
52 + *
53 + * ALTERNATIVELY, this software may be distributed under the terms of the
54 + * GNU General Public License ("GPL") as published by the Free Software
55 + * Foundation, either version 2 of that License or (at your option) any
56 + * later version.
57 + *
58 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
59 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
62 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
63 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
64 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
65 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
66 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
67 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 + * POSSIBILITY OF SUCH DAMAGE.
69 + */
70 +#ifndef _FSL_DPRTC_CMD_H
71 +#define _FSL_DPRTC_CMD_H
72 +
73 +/* DPRTC Version */
74 +#define DPRTC_VER_MAJOR 2
75 +#define DPRTC_VER_MINOR 0
76 +
77 +/* Command versioning */
78 +#define DPRTC_CMD_BASE_VERSION 1
79 +#define DPRTC_CMD_ID_OFFSET 4
80 +
81 +#define DPRTC_CMD(id) (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
82 +
83 +/* Command IDs */
84 +#define DPRTC_CMDID_CLOSE DPRTC_CMD(0x800)
85 +#define DPRTC_CMDID_OPEN DPRTC_CMD(0x810)
86 +#define DPRTC_CMDID_CREATE DPRTC_CMD(0x910)
87 +#define DPRTC_CMDID_DESTROY DPRTC_CMD(0x990)
88 +#define DPRTC_CMDID_GET_API_VERSION DPRTC_CMD(0xa10)
89 +
90 +#define DPRTC_CMDID_ENABLE DPRTC_CMD(0x002)
91 +#define DPRTC_CMDID_DISABLE DPRTC_CMD(0x003)
92 +#define DPRTC_CMDID_GET_ATTR DPRTC_CMD(0x004)
93 +#define DPRTC_CMDID_RESET DPRTC_CMD(0x005)
94 +#define DPRTC_CMDID_IS_ENABLED DPRTC_CMD(0x006)
95 +
96 +#define DPRTC_CMDID_SET_IRQ_ENABLE DPRTC_CMD(0x012)
97 +#define DPRTC_CMDID_GET_IRQ_ENABLE DPRTC_CMD(0x013)
98 +#define DPRTC_CMDID_SET_IRQ_MASK DPRTC_CMD(0x014)
99 +#define DPRTC_CMDID_GET_IRQ_MASK DPRTC_CMD(0x015)
100 +#define DPRTC_CMDID_GET_IRQ_STATUS DPRTC_CMD(0x016)
101 +#define DPRTC_CMDID_CLEAR_IRQ_STATUS DPRTC_CMD(0x017)
102 +
103 +#define DPRTC_CMDID_SET_CLOCK_OFFSET DPRTC_CMD(0x1d0)
104 +#define DPRTC_CMDID_SET_FREQ_COMPENSATION DPRTC_CMD(0x1d1)
105 +#define DPRTC_CMDID_GET_FREQ_COMPENSATION DPRTC_CMD(0x1d2)
106 +#define DPRTC_CMDID_GET_TIME DPRTC_CMD(0x1d3)
107 +#define DPRTC_CMDID_SET_TIME DPRTC_CMD(0x1d4)
108 +#define DPRTC_CMDID_SET_ALARM DPRTC_CMD(0x1d5)
109 +#define DPRTC_CMDID_SET_PERIODIC_PULSE DPRTC_CMD(0x1d6)
110 +#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE DPRTC_CMD(0x1d7)
111 +#define DPRTC_CMDID_SET_EXT_TRIGGER DPRTC_CMD(0x1d8)
112 +#define DPRTC_CMDID_CLEAR_EXT_TRIGGER DPRTC_CMD(0x1d9)
113 +#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP DPRTC_CMD(0x1dA)
114 +
115 +/* Macros for accessing command fields smaller than 1byte */
116 +#define DPRTC_MASK(field) \
117 + GENMASK(DPRTC_##field##_SHIFT + DPRTC_##field##_SIZE - 1, \
118 + DPRTC_##field##_SHIFT)
119 +#define dprtc_get_field(var, field) \
120 + (((var) & DPRTC_MASK(field)) >> DPRTC_##field##_SHIFT)
121 +
122 +#pragma pack(push, 1)
123 +struct dprtc_cmd_open {
124 + uint32_t dprtc_id;
125 +};
126 +
127 +struct dprtc_cmd_destroy {
128 + uint32_t object_id;
129 +};
130 +
131 +#define DPRTC_ENABLE_SHIFT 0
132 +#define DPRTC_ENABLE_SIZE 1
133 +
134 +struct dprtc_rsp_is_enabled {
135 + uint8_t en;
136 +};
137 +
138 +struct dprtc_cmd_get_irq {
139 + uint32_t pad;
140 + uint8_t irq_index;
141 +};
142 +
143 +struct dprtc_cmd_set_irq_enable {
144 + uint8_t en;
145 + uint8_t pad[3];
146 + uint8_t irq_index;
147 +};
148 +
149 +struct dprtc_rsp_get_irq_enable {
150 + uint8_t en;
151 +};
152 +
153 +struct dprtc_cmd_set_irq_mask {
154 + uint32_t mask;
155 + uint8_t irq_index;
156 +};
157 +
158 +struct dprtc_rsp_get_irq_mask {
159 + uint32_t mask;
160 +};
161 +
162 +struct dprtc_cmd_get_irq_status {
163 + uint32_t status;
164 + uint8_t irq_index;
165 +};
166 +
167 +struct dprtc_rsp_get_irq_status {
168 + uint32_t status;
169 +};
170 +
171 +struct dprtc_cmd_clear_irq_status {
172 + uint32_t status;
173 + uint8_t irq_index;
174 +};
175 +
176 +struct dprtc_rsp_get_attributes {
177 + uint32_t pad;
178 + uint32_t id;
179 +};
180 +
181 +struct dprtc_cmd_set_clock_offset {
182 + uint64_t offset;
183 +};
184 +
185 +struct dprtc_get_freq_compensation {
186 + uint32_t freq_compensation;
187 +};
188 +
189 +struct dprtc_time {
190 + uint64_t time;
191 +};
192 +
193 +struct dprtc_rsp_get_api_version {
194 + uint16_t major;
195 + uint16_t minor;
196 +};
197 +#pragma pack(pop)
198 +#endif /* _FSL_DPRTC_CMD_H */
199 --- /dev/null
200 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.c
201 @@ -0,0 +1,746 @@
202 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
203 + *
204 + * Redistribution and use in source and binary forms, with or without
205 + * modification, are permitted provided that the following conditions are met:
206 + * * Redistributions of source code must retain the above copyright
207 + * notice, this list of conditions and the following disclaimer.
208 + * * Redistributions in binary form must reproduce the above copyright
209 + * notice, this list of conditions and the following disclaimer in the
210 + * documentation and/or other materials provided with the distribution.
211 + * * Neither the name of the above-listed copyright holders nor the
212 + * names of any contributors may be used to endorse or promote products
213 + * derived from this software without specific prior written permission.
214 + *
215 + *
216 + * ALTERNATIVELY, this software may be distributed under the terms of the
217 + * GNU General Public License ("GPL") as published by the Free Software
218 + * Foundation, either version 2 of that License or (at your option) any
219 + * later version.
220 + *
221 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
222 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
223 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
224 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
225 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
226 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
227 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
228 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
229 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
230 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
231 + * POSSIBILITY OF SUCH DAMAGE.
232 + */
233 +#include <linux/fsl/mc.h>
234 +
235 +#include "dprtc.h"
236 +#include "dprtc-cmd.h"
237 +
238 +/**
239 + * dprtc_open() - Open a control session for the specified object.
240 + * @mc_io: Pointer to MC portal's I/O object
241 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
242 + * @dprtc_id: DPRTC unique ID
243 + * @token: Returned token; use in subsequent API calls
244 + *
245 + * This function can be used to open a control session for an
246 + * already created object; an object may have been declared in
247 + * the DPL or by calling the dprtc_create function.
248 + * This function returns a unique authentication token,
249 + * associated with the specific object ID and the specific MC
250 + * portal; this token must be used in all subsequent commands for
251 + * this specific object
252 + *
253 + * Return: '0' on Success; Error code otherwise.
254 + */
255 +int dprtc_open(struct fsl_mc_io *mc_io,
256 + uint32_t cmd_flags,
257 + int dprtc_id,
258 + uint16_t *token)
259 +{
260 + struct dprtc_cmd_open *cmd_params;
261 + struct fsl_mc_command cmd = { 0 };
262 + int err;
263 +
264 + /* prepare command */
265 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
266 + cmd_flags,
267 + 0);
268 + cmd_params = (struct dprtc_cmd_open *)cmd.params;
269 + cmd_params->dprtc_id = cpu_to_le32(dprtc_id);
270 +
271 + /* send command to mc*/
272 + err = mc_send_command(mc_io, &cmd);
273 + if (err)
274 + return err;
275 +
276 + /* retrieve response parameters */
277 + *token = mc_cmd_hdr_read_token(&cmd);
278 +
279 + return err;
280 +}
281 +
282 +/**
283 + * dprtc_close() - Close the control session of the object
284 + * @mc_io: Pointer to MC portal's I/O object
285 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
286 + * @token: Token of DPRTC object
287 + *
288 + * After this function is called, no further operations are
289 + * allowed on the object without opening a new control session.
290 + *
291 + * Return: '0' on Success; Error code otherwise.
292 + */
293 +int dprtc_close(struct fsl_mc_io *mc_io,
294 + uint32_t cmd_flags,
295 + uint16_t token)
296 +{
297 + struct fsl_mc_command cmd = { 0 };
298 +
299 + /* prepare command */
300 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
301 + token);
302 +
303 + /* send command to mc*/
304 + return mc_send_command(mc_io, &cmd);
305 +}
306 +
307 +/**
308 + * dprtc_create() - Create the DPRTC object.
309 + * @mc_io: Pointer to MC portal's I/O object
310 + * @dprc_token: Parent container token; '0' for default container
311 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
312 + * @cfg: Configuration structure
313 + * @obj_id: Returned object id
314 + *
315 + * Create the DPRTC object, allocate required resources and
316 + * perform required initialization.
317 + *
318 + * The function accepts an authentication token of a parent
319 + * container that this object should be assigned to. The token
320 + * can be '0' so the object will be assigned to the default container.
321 + * The newly created object can be opened with the returned
322 + * object id and using the container's associated tokens and MC portals.
323 + *
324 + * Return: '0' on Success; Error code otherwise.
325 + */
326 +int dprtc_create(struct fsl_mc_io *mc_io,
327 + uint16_t dprc_token,
328 + uint32_t cmd_flags,
329 + const struct dprtc_cfg *cfg,
330 + uint32_t *obj_id)
331 +{
332 + struct fsl_mc_command cmd = { 0 };
333 + int err;
334 +
335 + (void)(cfg); /* unused */
336 +
337 + /* prepare command */
338 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
339 + cmd_flags,
340 + dprc_token);
341 +
342 + /* send command to mc*/
343 + err = mc_send_command(mc_io, &cmd);
344 + if (err)
345 + return err;
346 +
347 + /* retrieve response parameters */
348 + *obj_id = mc_cmd_read_object_id(&cmd);
349 +
350 + return 0;
351 +}
352 +
353 +/**
354 + * dprtc_destroy() - Destroy the DPRTC object and release all its resources.
355 + * @mc_io: Pointer to MC portal's I/O object
356 + * @dprc_token: Parent container token; '0' for default container
357 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
358 + * @object_id: The object id; it must be a valid id within the container that
359 + * created this object;
360 + *
361 + * The function accepts the authentication token of the parent container that
362 + * created the object (not the one that currently owns the object). The object
363 + * is searched within parent using the provided 'object_id'.
364 + * All tokens to the object must be closed before calling destroy.
365 + *
366 + * Return: '0' on Success; error code otherwise.
367 + */
368 +int dprtc_destroy(struct fsl_mc_io *mc_io,
369 + uint16_t dprc_token,
370 + uint32_t cmd_flags,
371 + uint32_t object_id)
372 +{
373 + struct dprtc_cmd_destroy *cmd_params;
374 + struct fsl_mc_command cmd = { 0 };
375 +
376 + /* prepare command */
377 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
378 + cmd_flags,
379 + dprc_token);
380 + cmd_params = (struct dprtc_cmd_destroy *)cmd.params;
381 + cmd_params->object_id = cpu_to_le32(object_id);
382 +
383 + /* send command to mc*/
384 + return mc_send_command(mc_io, &cmd);
385 +}
386 +
387 +int dprtc_enable(struct fsl_mc_io *mc_io,
388 + uint32_t cmd_flags,
389 + uint16_t token)
390 +{
391 + struct fsl_mc_command cmd = { 0 };
392 +
393 + /* prepare command */
394 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
395 + token);
396 +
397 + /* send command to mc*/
398 + return mc_send_command(mc_io, &cmd);
399 +}
400 +
401 +int dprtc_disable(struct fsl_mc_io *mc_io,
402 + uint32_t cmd_flags,
403 + uint16_t token)
404 +{
405 + struct fsl_mc_command cmd = { 0 };
406 +
407 + /* prepare command */
408 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
409 + cmd_flags,
410 + token);
411 +
412 + /* send command to mc*/
413 + return mc_send_command(mc_io, &cmd);
414 +}
415 +
416 +int dprtc_is_enabled(struct fsl_mc_io *mc_io,
417 + uint32_t cmd_flags,
418 + uint16_t token,
419 + int *en)
420 +{
421 + struct dprtc_rsp_is_enabled *rsp_params;
422 + struct fsl_mc_command cmd = { 0 };
423 + int err;
424 +
425 + /* prepare command */
426 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
427 + token);
428 +
429 + /* send command to mc*/
430 + err = mc_send_command(mc_io, &cmd);
431 + if (err)
432 + return err;
433 +
434 + /* retrieve response parameters */
435 + rsp_params = (struct dprtc_rsp_is_enabled *)cmd.params;
436 + *en = dprtc_get_field(rsp_params->en, ENABLE);
437 +
438 + return 0;
439 +}
440 +
441 +int dprtc_reset(struct fsl_mc_io *mc_io,
442 + uint32_t cmd_flags,
443 + uint16_t token)
444 +{
445 + struct fsl_mc_command cmd = { 0 };
446 +
447 + /* prepare command */
448 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
449 + cmd_flags,
450 + token);
451 +
452 + /* send command to mc*/
453 + return mc_send_command(mc_io, &cmd);
454 +}
455 +
456 +/**
457 + * dprtc_set_irq_enable() - Set overall interrupt state.
458 + * @mc_io: Pointer to MC portal's I/O object
459 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
460 + * @token: Token of DPRTC object
461 + * @irq_index: The interrupt index to configure
462 + * @en: Interrupt state - enable = 1, disable = 0
463 + *
464 + * Allows GPP software to control when interrupts are generated.
465 + * Each interrupt can have up to 32 causes. The enable/disable control's the
466 + * overall interrupt state. if the interrupt is disabled no causes will cause
467 + * an interrupt.
468 + *
469 + * Return: '0' on Success; Error code otherwise.
470 + */
471 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
472 + uint32_t cmd_flags,
473 + uint16_t token,
474 + uint8_t irq_index,
475 + uint8_t en)
476 +{
477 + struct dprtc_cmd_set_irq_enable *cmd_params;
478 + struct fsl_mc_command cmd = { 0 };
479 +
480 + /* prepare command */
481 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_ENABLE,
482 + cmd_flags,
483 + token);
484 + cmd_params = (struct dprtc_cmd_set_irq_enable *)cmd.params;
485 + cmd_params->irq_index = irq_index;
486 + cmd_params->en = en;
487 +
488 + /* send command to mc*/
489 + return mc_send_command(mc_io, &cmd);
490 +}
491 +
492 +/**
493 + * dprtc_get_irq_enable() - Get overall interrupt state
494 + * @mc_io: Pointer to MC portal's I/O object
495 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
496 + * @token: Token of DPRTC object
497 + * @irq_index: The interrupt index to configure
498 + * @en: Returned interrupt state - enable = 1, disable = 0
499 + *
500 + * Return: '0' on Success; Error code otherwise.
501 + */
502 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
503 + uint32_t cmd_flags,
504 + uint16_t token,
505 + uint8_t irq_index,
506 + uint8_t *en)
507 +{
508 + struct dprtc_rsp_get_irq_enable *rsp_params;
509 + struct dprtc_cmd_get_irq *cmd_params;
510 + struct fsl_mc_command cmd = { 0 };
511 + int err;
512 +
513 + /* prepare command */
514 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_ENABLE,
515 + cmd_flags,
516 + token);
517 + cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
518 + cmd_params->irq_index = irq_index;
519 +
520 + /* send command to mc*/
521 + err = mc_send_command(mc_io, &cmd);
522 + if (err)
523 + return err;
524 +
525 + /* retrieve response parameters */
526 + rsp_params = (struct dprtc_rsp_get_irq_enable *)cmd.params;
527 + *en = rsp_params->en;
528 +
529 + return 0;
530 +}
531 +
532 +/**
533 + * dprtc_set_irq_mask() - Set interrupt mask.
534 + * @mc_io: Pointer to MC portal's I/O object
535 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
536 + * @token: Token of DPRTC object
537 + * @irq_index: The interrupt index to configure
538 + * @mask: Event mask to trigger interrupt;
539 + * each bit:
540 + * 0 = ignore event
541 + * 1 = consider event for asserting IRQ
542 + *
543 + * Every interrupt can have up to 32 causes and the interrupt model supports
544 + * masking/unmasking each cause independently
545 + *
546 + * Return: '0' on Success; Error code otherwise.
547 + */
548 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
549 + uint32_t cmd_flags,
550 + uint16_t token,
551 + uint8_t irq_index,
552 + uint32_t mask)
553 +{
554 + struct dprtc_cmd_set_irq_mask *cmd_params;
555 + struct fsl_mc_command cmd = { 0 };
556 +
557 + /* prepare command */
558 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_MASK,
559 + cmd_flags,
560 + token);
561 + cmd_params = (struct dprtc_cmd_set_irq_mask *)cmd.params;
562 + cmd_params->mask = cpu_to_le32(mask);
563 + cmd_params->irq_index = irq_index;
564 +
565 + /* send command to mc*/
566 + return mc_send_command(mc_io, &cmd);
567 +}
568 +
569 +/**
570 + * dprtc_get_irq_mask() - Get interrupt mask.
571 + * @mc_io: Pointer to MC portal's I/O object
572 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
573 + * @token: Token of DPRTC object
574 + * @irq_index: The interrupt index to configure
575 + * @mask: Returned event mask to trigger interrupt
576 + *
577 + * Every interrupt can have up to 32 causes and the interrupt model supports
578 + * masking/unmasking each cause independently
579 + *
580 + * Return: '0' on Success; Error code otherwise.
581 + */
582 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
583 + uint32_t cmd_flags,
584 + uint16_t token,
585 + uint8_t irq_index,
586 + uint32_t *mask)
587 +{
588 + struct dprtc_rsp_get_irq_mask *rsp_params;
589 + struct dprtc_cmd_get_irq *cmd_params;
590 + struct fsl_mc_command cmd = { 0 };
591 + int err;
592 +
593 + /* prepare command */
594 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_MASK,
595 + cmd_flags,
596 + token);
597 + cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
598 + cmd_params->irq_index = irq_index;
599 +
600 + /* send command to mc*/
601 + err = mc_send_command(mc_io, &cmd);
602 + if (err)
603 + return err;
604 +
605 + /* retrieve response parameters */
606 + rsp_params = (struct dprtc_rsp_get_irq_mask *)cmd.params;
607 + *mask = le32_to_cpu(rsp_params->mask);
608 +
609 + return 0;
610 +}
611 +
612 +/**
613 + * dprtc_get_irq_status() - Get the current status of any pending interrupts.
614 + *
615 + * @mc_io: Pointer to MC portal's I/O object
616 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
617 + * @token: Token of DPRTC object
618 + * @irq_index: The interrupt index to configure
619 + * @status: Returned interrupts status - one bit per cause:
620 + * 0 = no interrupt pending
621 + * 1 = interrupt pending
622 + *
623 + * Return: '0' on Success; Error code otherwise.
624 + */
625 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
626 + uint32_t cmd_flags,
627 + uint16_t token,
628 + uint8_t irq_index,
629 + uint32_t *status)
630 +{
631 + struct dprtc_cmd_get_irq_status *cmd_params;
632 + struct dprtc_rsp_get_irq_status *rsp_params;
633 + struct fsl_mc_command cmd = { 0 };
634 + int err;
635 +
636 + /* prepare command */
637 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_STATUS,
638 + cmd_flags,
639 + token);
640 + cmd_params = (struct dprtc_cmd_get_irq_status *)cmd.params;
641 + cmd_params->status = cpu_to_le32(*status);
642 + cmd_params->irq_index = irq_index;
643 +
644 + /* send command to mc*/
645 + err = mc_send_command(mc_io, &cmd);
646 + if (err)
647 + return err;
648 +
649 + /* retrieve response parameters */
650 + rsp_params = (struct dprtc_rsp_get_irq_status *)cmd.params;
651 + *status = rsp_params->status;
652 +
653 + return 0;
654 +}
655 +
656 +/**
657 + * dprtc_clear_irq_status() - Clear a pending interrupt's status
658 + *
659 + * @mc_io: Pointer to MC portal's I/O object
660 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
661 + * @token: Token of DPRTC object
662 + * @irq_index: The interrupt index to configure
663 + * @status: Bits to clear (W1C) - one bit per cause:
664 + * 0 = don't change
665 + * 1 = clear status bit
666 + *
667 + * Return: '0' on Success; Error code otherwise.
668 + */
669 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
670 + uint32_t cmd_flags,
671 + uint16_t token,
672 + uint8_t irq_index,
673 + uint32_t status)
674 +{
675 + struct dprtc_cmd_clear_irq_status *cmd_params;
676 + struct fsl_mc_command cmd = { 0 };
677 +
678 + /* prepare command */
679 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLEAR_IRQ_STATUS,
680 + cmd_flags,
681 + token);
682 + cmd_params = (struct dprtc_cmd_clear_irq_status *)cmd.params;
683 + cmd_params->irq_index = irq_index;
684 + cmd_params->status = cpu_to_le32(status);
685 +
686 + /* send command to mc*/
687 + return mc_send_command(mc_io, &cmd);
688 +}
689 +
690 +/**
691 + * dprtc_get_attributes - Retrieve DPRTC attributes.
692 + *
693 + * @mc_io: Pointer to MC portal's I/O object
694 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
695 + * @token: Token of DPRTC object
696 + * @attr: Returned object's attributes
697 + *
698 + * Return: '0' on Success; Error code otherwise.
699 + */
700 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
701 + uint32_t cmd_flags,
702 + uint16_t token,
703 + struct dprtc_attr *attr)
704 +{
705 + struct dprtc_rsp_get_attributes *rsp_params;
706 + struct fsl_mc_command cmd = { 0 };
707 + int err;
708 +
709 + /* prepare command */
710 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
711 + cmd_flags,
712 + token);
713 +
714 + /* send command to mc*/
715 + err = mc_send_command(mc_io, &cmd);
716 + if (err)
717 + return err;
718 +
719 + /* retrieve response parameters */
720 + rsp_params = (struct dprtc_rsp_get_attributes *)cmd.params;
721 + attr->id = le32_to_cpu(rsp_params->id);
722 +
723 + return 0;
724 +}
725 +
726 +/**
727 + * dprtc_set_clock_offset() - Sets the clock's offset
728 + * (usually relative to another clock).
729 + *
730 + * @mc_io: Pointer to MC portal's I/O object
731 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
732 + * @token: Token of DPRTC object
733 + * @offset: New clock offset (in nanoseconds).
734 + *
735 + * Return: '0' on Success; Error code otherwise.
736 + */
737 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
738 + uint32_t cmd_flags,
739 + uint16_t token,
740 + int64_t offset)
741 +{
742 + struct dprtc_cmd_set_clock_offset *cmd_params;
743 + struct fsl_mc_command cmd = { 0 };
744 +
745 + /* prepare command */
746 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
747 + cmd_flags,
748 + token);
749 + cmd_params = (struct dprtc_cmd_set_clock_offset *)cmd.params;
750 + cmd_params->offset = cpu_to_le64(offset);
751 +
752 + /* send command to mc*/
753 + return mc_send_command(mc_io, &cmd);
754 +}
755 +
756 +/**
757 + * dprtc_set_freq_compensation() - Sets a new frequency compensation value.
758 + *
759 + * @mc_io: Pointer to MC portal's I/O object
760 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
761 + * @token: Token of DPRTC object
762 + * @freq_compensation: The new frequency compensation value to set.
763 + *
764 + * Return: '0' on Success; Error code otherwise.
765 + */
766 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
767 + uint32_t cmd_flags,
768 + uint16_t token,
769 + uint32_t freq_compensation)
770 +{
771 + struct dprtc_get_freq_compensation *cmd_params;
772 + struct fsl_mc_command cmd = { 0 };
773 +
774 + /* prepare command */
775 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
776 + cmd_flags,
777 + token);
778 + cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
779 + cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
780 +
781 + /* send command to mc*/
782 + return mc_send_command(mc_io, &cmd);
783 +}
784 +
785 +/**
786 + * dprtc_get_freq_compensation() - Retrieves the frequency compensation value
787 + *
788 + * @mc_io: Pointer to MC portal's I/O object
789 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
790 + * @token: Token of DPRTC object
791 + * @freq_compensation: Frequency compensation value
792 + *
793 + * Return: '0' on Success; Error code otherwise.
794 + */
795 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
796 + uint32_t cmd_flags,
797 + uint16_t token,
798 + uint32_t *freq_compensation)
799 +{
800 + struct dprtc_get_freq_compensation *rsp_params;
801 + struct fsl_mc_command cmd = { 0 };
802 + int err;
803 +
804 + /* prepare command */
805 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
806 + cmd_flags,
807 + token);
808 +
809 + /* send command to mc*/
810 + err = mc_send_command(mc_io, &cmd);
811 + if (err)
812 + return err;
813 +
814 + /* retrieve response parameters */
815 + rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
816 + *freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
817 +
818 + return 0;
819 +}
820 +
821 +/**
822 + * dprtc_get_time() - Returns the current RTC time.
823 + *
824 + * @mc_io: Pointer to MC portal's I/O object
825 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
826 + * @token: Token of DPRTC object
827 + * @time: Current RTC time.
828 + *
829 + * Return: '0' on Success; Error code otherwise.
830 + */
831 +int dprtc_get_time(struct fsl_mc_io *mc_io,
832 + uint32_t cmd_flags,
833 + uint16_t token,
834 + uint64_t *time)
835 +{
836 + struct dprtc_time *rsp_params;
837 + struct fsl_mc_command cmd = { 0 };
838 + int err;
839 +
840 + /* prepare command */
841 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
842 + cmd_flags,
843 + token);
844 +
845 + /* send command to mc*/
846 + err = mc_send_command(mc_io, &cmd);
847 + if (err)
848 + return err;
849 +
850 + /* retrieve response parameters */
851 + rsp_params = (struct dprtc_time *)cmd.params;
852 + *time = le64_to_cpu(rsp_params->time);
853 +
854 + return 0;
855 +}
856 +
857 +/**
858 + * dprtc_set_time() - Updates current RTC time.
859 + *
860 + * @mc_io: Pointer to MC portal's I/O object
861 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
862 + * @token: Token of DPRTC object
863 + * @time: New RTC time.
864 + *
865 + * Return: '0' on Success; Error code otherwise.
866 + */
867 +int dprtc_set_time(struct fsl_mc_io *mc_io,
868 + uint32_t cmd_flags,
869 + uint16_t token,
870 + uint64_t time)
871 +{
872 + struct dprtc_time *cmd_params;
873 + struct fsl_mc_command cmd = { 0 };
874 +
875 + /* prepare command */
876 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
877 + cmd_flags,
878 + token);
879 + cmd_params = (struct dprtc_time *)cmd.params;
880 + cmd_params->time = cpu_to_le64(time);
881 +
882 + /* send command to mc*/
883 + return mc_send_command(mc_io, &cmd);
884 +}
885 +
886 +/**
887 + * dprtc_set_alarm() - Defines and sets alarm.
888 + *
889 + * @mc_io: Pointer to MC portal's I/O object
890 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
891 + * @token: Token of DPRTC object
892 + * @time: In nanoseconds, the time when the alarm
893 + * should go off - must be a multiple of
894 + * 1 microsecond
895 + *
896 + * Return: '0' on Success; Error code otherwise.
897 + */
898 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
899 + uint32_t cmd_flags,
900 + uint16_t token, uint64_t time)
901 +{
902 + struct dprtc_time *cmd_params;
903 + struct fsl_mc_command cmd = { 0 };
904 +
905 + /* prepare command */
906 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
907 + cmd_flags,
908 + token);
909 + cmd_params = (struct dprtc_time *)cmd.params;
910 + cmd_params->time = cpu_to_le64(time);
911 +
912 + /* send command to mc*/
913 + return mc_send_command(mc_io, &cmd);
914 +}
915 +
916 +/**
917 + * dprtc_get_api_version() - Get Data Path Real Time Counter API version
918 + * @mc_io: Pointer to MC portal's I/O object
919 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
920 + * @major_ver: Major version of data path real time counter API
921 + * @minor_ver: Minor version of data path real time counter API
922 + *
923 + * Return: '0' on Success; Error code otherwise.
924 + */
925 +int dprtc_get_api_version(struct fsl_mc_io *mc_io,
926 + uint32_t cmd_flags,
927 + uint16_t *major_ver,
928 + uint16_t *minor_ver)
929 +{
930 + struct dprtc_rsp_get_api_version *rsp_params;
931 + struct fsl_mc_command cmd = { 0 };
932 + int err;
933 +
934 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_API_VERSION,
935 + cmd_flags,
936 + 0);
937 +
938 + err = mc_send_command(mc_io, &cmd);
939 + if (err)
940 + return err;
941 +
942 + rsp_params = (struct dprtc_rsp_get_api_version *)cmd.params;
943 + *major_ver = le16_to_cpu(rsp_params->major);
944 + *minor_ver = le16_to_cpu(rsp_params->minor);
945 +
946 + return 0;
947 +}
948 --- /dev/null
949 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.h
950 @@ -0,0 +1,172 @@
951 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
952 + *
953 + * Redistribution and use in source and binary forms, with or without
954 + * modification, are permitted provided that the following conditions are met:
955 + * * Redistributions of source code must retain the above copyright
956 + * notice, this list of conditions and the following disclaimer.
957 + * * Redistributions in binary form must reproduce the above copyright
958 + * notice, this list of conditions and the following disclaimer in the
959 + * documentation and/or other materials provided with the distribution.
960 + * * Neither the name of the above-listed copyright holders nor the
961 + * names of any contributors may be used to endorse or promote products
962 + * derived from this software without specific prior written permission.
963 + *
964 + *
965 + * ALTERNATIVELY, this software may be distributed under the terms of the
966 + * GNU General Public License ("GPL") as published by the Free Software
967 + * Foundation, either version 2 of that License or (at your option) any
968 + * later version.
969 + *
970 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
971 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
972 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
973 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
974 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
975 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
976 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
977 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
978 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
979 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
980 + * POSSIBILITY OF SUCH DAMAGE.
981 + */
982 +#ifndef __FSL_DPRTC_H
983 +#define __FSL_DPRTC_H
984 +
985 +/* Data Path Real Time Counter API
986 + * Contains initialization APIs and runtime control APIs for RTC
987 + */
988 +
989 +struct fsl_mc_io;
990 +
991 +/**
992 + * Number of irq's
993 + */
994 +#define DPRTC_MAX_IRQ_NUM 1
995 +#define DPRTC_IRQ_INDEX 0
996 +
997 +/**
998 + * Interrupt event masks:
999 + */
1000 +
1001 +/**
1002 + * Interrupt event mask indicating alarm event had occurred
1003 + */
1004 +#define DPRTC_EVENT_ALARM 0x40000000
1005 +/**
1006 + * Interrupt event mask indicating periodic pulse event had occurred
1007 + */
1008 +#define DPRTC_EVENT_PPS 0x08000000
1009 +
1010 +int dprtc_open(struct fsl_mc_io *mc_io,
1011 + uint32_t cmd_flags,
1012 + int dprtc_id,
1013 + uint16_t *token);
1014 +
1015 +int dprtc_close(struct fsl_mc_io *mc_io,
1016 + uint32_t cmd_flags,
1017 + uint16_t token);
1018 +
1019 +/**
1020 + * struct dprtc_cfg - Structure representing DPRTC configuration
1021 + * @options: place holder
1022 + */
1023 +struct dprtc_cfg {
1024 + uint32_t options;
1025 +};
1026 +
1027 +int dprtc_create(struct fsl_mc_io *mc_io,
1028 + uint16_t dprc_token,
1029 + uint32_t cmd_flags,
1030 + const struct dprtc_cfg *cfg,
1031 + uint32_t *obj_id);
1032 +
1033 +int dprtc_destroy(struct fsl_mc_io *mc_io,
1034 + uint16_t dprc_token,
1035 + uint32_t cmd_flags,
1036 + uint32_t object_id);
1037 +
1038 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
1039 + uint32_t cmd_flags,
1040 + uint16_t token,
1041 + int64_t offset);
1042 +
1043 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
1044 + uint32_t cmd_flags,
1045 + uint16_t token,
1046 + uint32_t freq_compensation);
1047 +
1048 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
1049 + uint32_t cmd_flags,
1050 + uint16_t token,
1051 + uint32_t *freq_compensation);
1052 +
1053 +int dprtc_get_time(struct fsl_mc_io *mc_io,
1054 + uint32_t cmd_flags,
1055 + uint16_t token,
1056 + uint64_t *time);
1057 +
1058 +int dprtc_set_time(struct fsl_mc_io *mc_io,
1059 + uint32_t cmd_flags,
1060 + uint16_t token,
1061 + uint64_t time);
1062 +
1063 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
1064 + uint32_t cmd_flags,
1065 + uint16_t token,
1066 + uint64_t time);
1067 +
1068 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
1069 + uint32_t cmd_flags,
1070 + uint16_t token,
1071 + uint8_t irq_index,
1072 + uint8_t en);
1073 +
1074 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
1075 + uint32_t cmd_flags,
1076 + uint16_t token,
1077 + uint8_t irq_index,
1078 + uint8_t *en);
1079 +
1080 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
1081 + uint32_t cmd_flags,
1082 + uint16_t token,
1083 + uint8_t irq_index,
1084 + uint32_t mask);
1085 +
1086 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
1087 + uint32_t cmd_flags,
1088 + uint16_t token,
1089 + uint8_t irq_index,
1090 + uint32_t *mask);
1091 +
1092 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
1093 + uint32_t cmd_flags,
1094 + uint16_t token,
1095 + uint8_t irq_index,
1096 + uint32_t *status);
1097 +
1098 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
1099 + uint32_t cmd_flags,
1100 + uint16_t token,
1101 + uint8_t irq_index,
1102 + uint32_t status);
1103 +
1104 +/**
1105 + * struct dprtc_attr - Structure representing DPRTC attributes
1106 + * @id: DPRTC object ID
1107 + */
1108 +struct dprtc_attr {
1109 + int id;
1110 +};
1111 +
1112 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
1113 + uint32_t cmd_flags,
1114 + uint16_t token,
1115 + struct dprtc_attr *attr);
1116 +
1117 +int dprtc_get_api_version(struct fsl_mc_io *mc_io,
1118 + uint32_t cmd_flags,
1119 + uint16_t *major_ver,
1120 + uint16_t *minor_ver);
1121 +
1122 +#endif /* __FSL_DPRTC_H */
1123 --- /dev/null
1124 +++ b/drivers/staging/fsl-dpaa2/rtc/rtc.c
1125 @@ -0,0 +1,242 @@
1126 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
1127 + *
1128 + * Redistribution and use in source and binary forms, with or without
1129 + * modification, are permitted provided that the following conditions are met:
1130 + * * Redistributions of source code must retain the above copyright
1131 + * notice, this list of conditions and the following disclaimer.
1132 + * * Redistributions in binary form must reproduce the above copyright
1133 + * notice, this list of conditions and the following disclaimer in the
1134 + * documentation and/or other materials provided with the distribution.
1135 + * * Neither the name of the above-listed copyright holders nor the
1136 + * names of any contributors may be used to endorse or promote products
1137 + * derived from this software without specific prior written permission.
1138 + *
1139 + *
1140 + * ALTERNATIVELY, this software may be distributed under the terms of the
1141 + * GNU General Public License ("GPL") as published by the Free Software
1142 + * Foundation, either version 2 of that License or (at your option) any
1143 + * later version.
1144 + *
1145 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1146 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1147 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1148 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
1149 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1150 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1151 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1152 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1153 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1154 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1155 + * POSSIBILITY OF SUCH DAMAGE.
1156 + */
1157 +
1158 +#include <linux/module.h>
1159 +#include <linux/ptp_clock_kernel.h>
1160 +
1161 +#include <linux/fsl/mc.h>
1162 +
1163 +#include "dprtc.h"
1164 +#include "dprtc-cmd.h"
1165 +
1166 +#define N_EXT_TS 2
1167 +
1168 +struct ptp_clock *clock;
1169 +struct fsl_mc_device *rtc_mc_dev;
1170 +u32 freqCompensation;
1171 +
1172 +/* PTP clock operations */
1173 +static int ptp_dpaa2_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
1174 +{
1175 + u64 adj;
1176 + u32 diff, tmr_add;
1177 + int neg_adj = 0;
1178 + int err = 0;
1179 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1180 + struct device *dev = &mc_dev->dev;
1181 +
1182 + if (ppb < 0) {
1183 + neg_adj = 1;
1184 + ppb = -ppb;
1185 + }
1186 +
1187 + tmr_add = freqCompensation;
1188 + adj = tmr_add;
1189 + adj *= ppb;
1190 + diff = div_u64(adj, 1000000000ULL);
1191 +
1192 + tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
1193 +
1194 + err = dprtc_set_freq_compensation(mc_dev->mc_io, 0,
1195 + mc_dev->mc_handle, tmr_add);
1196 + if (err)
1197 + dev_err(dev, "dprtc_set_freq_compensation err %d\n", err);
1198 + return 0;
1199 +}
1200 +
1201 +static int ptp_dpaa2_adjtime(struct ptp_clock_info *ptp, s64 delta)
1202 +{
1203 + s64 now;
1204 + int err = 0;
1205 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1206 + struct device *dev = &mc_dev->dev;
1207 +
1208 + err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &now);
1209 + if (err) {
1210 + dev_err(dev, "dprtc_get_time err %d\n", err);
1211 + return 0;
1212 + }
1213 +
1214 + now += delta;
1215 +
1216 + err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, now);
1217 + if (err) {
1218 + dev_err(dev, "dprtc_set_time err %d\n", err);
1219 + return 0;
1220 + }
1221 + return 0;
1222 +}
1223 +
1224 +static int ptp_dpaa2_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
1225 +{
1226 + u64 ns;
1227 + u32 remainder;
1228 + int err = 0;
1229 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1230 + struct device *dev = &mc_dev->dev;
1231 +
1232 + err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &ns);
1233 + if (err) {
1234 + dev_err(dev, "dprtc_get_time err %d\n", err);
1235 + return 0;
1236 + }
1237 +
1238 + ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
1239 + ts->tv_nsec = remainder;
1240 + return 0;
1241 +}
1242 +
1243 +static int ptp_dpaa2_settime(struct ptp_clock_info *ptp,
1244 + const struct timespec *ts)
1245 +{
1246 + u64 ns;
1247 + int err = 0;
1248 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1249 + struct device *dev = &mc_dev->dev;
1250 +
1251 + ns = ts->tv_sec * 1000000000ULL;
1252 + ns += ts->tv_nsec;
1253 +
1254 + err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, ns);
1255 + if (err)
1256 + dev_err(dev, "dprtc_set_time err %d\n", err);
1257 + return 0;
1258 +}
1259 +
1260 +static struct ptp_clock_info ptp_dpaa2_caps = {
1261 + .owner = THIS_MODULE,
1262 + .name = "dpaa2 clock",
1263 + .max_adj = 512000,
1264 + .n_alarm = 0,
1265 + .n_ext_ts = N_EXT_TS,
1266 + .n_per_out = 0,
1267 + .n_pins = 0,
1268 + .pps = 1,
1269 + .adjfreq = ptp_dpaa2_adjfreq,
1270 + .adjtime = ptp_dpaa2_adjtime,
1271 + .gettime64 = ptp_dpaa2_gettime,
1272 + .settime64 = ptp_dpaa2_settime,
1273 +};
1274 +
1275 +static int rtc_probe(struct fsl_mc_device *mc_dev)
1276 +{
1277 + struct device *dev;
1278 + int err = 0;
1279 + int dpaa2_phc_index;
1280 + u32 tmr_add = 0;
1281 +
1282 + if (!mc_dev)
1283 + return -EFAULT;
1284 +
1285 + dev = &mc_dev->dev;
1286 +
1287 + err = fsl_mc_portal_allocate(mc_dev, 0, &mc_dev->mc_io);
1288 + if (unlikely(err)) {
1289 + dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
1290 + goto err_exit;
1291 + }
1292 + if (!mc_dev->mc_io) {
1293 + dev_err(dev,
1294 + "fsl_mc_portal_allocate returned null handle but no error\n");
1295 + err = -EFAULT;
1296 + goto err_exit;
1297 + }
1298 +
1299 + err = dprtc_open(mc_dev->mc_io, 0, mc_dev->obj_desc.id,
1300 + &mc_dev->mc_handle);
1301 + if (err) {
1302 + dev_err(dev, "dprtc_open err %d\n", err);
1303 + goto err_free_mcp;
1304 + }
1305 + if (!mc_dev->mc_handle) {
1306 + dev_err(dev, "dprtc_open returned null handle but no error\n");
1307 + err = -EFAULT;
1308 + goto err_free_mcp;
1309 + }
1310 +
1311 + rtc_mc_dev = mc_dev;
1312 +
1313 + err = dprtc_get_freq_compensation(mc_dev->mc_io, 0,
1314 + mc_dev->mc_handle, &tmr_add);
1315 + if (err) {
1316 + dev_err(dev, "dprtc_get_freq_compensation err %d\n", err);
1317 + goto err_close;
1318 + }
1319 + freqCompensation = tmr_add;
1320 +
1321 + clock = ptp_clock_register(&ptp_dpaa2_caps, dev);
1322 + if (IS_ERR(clock)) {
1323 + err = PTR_ERR(clock);
1324 + goto err_close;
1325 + }
1326 + dpaa2_phc_index = ptp_clock_index(clock);
1327 +
1328 + return 0;
1329 +err_close:
1330 + dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
1331 +err_free_mcp:
1332 + fsl_mc_portal_free(mc_dev->mc_io);
1333 +err_exit:
1334 + return err;
1335 +}
1336 +
1337 +static int rtc_remove(struct fsl_mc_device *mc_dev)
1338 +{
1339 + ptp_clock_unregister(clock);
1340 + dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
1341 + fsl_mc_portal_free(mc_dev->mc_io);
1342 +
1343 + return 0;
1344 +}
1345 +
1346 +static const struct fsl_mc_device_id rtc_match_id_table[] = {
1347 + {
1348 + .vendor = FSL_MC_VENDOR_FREESCALE,
1349 + .obj_type = "dprtc",
1350 + },
1351 + {}
1352 +};
1353 +
1354 +static struct fsl_mc_driver rtc_drv = {
1355 + .driver = {
1356 + .name = KBUILD_MODNAME,
1357 + .owner = THIS_MODULE,
1358 + },
1359 + .probe = rtc_probe,
1360 + .remove = rtc_remove,
1361 + .match_id_table = rtc_match_id_table,
1362 +};
1363 +
1364 +module_fsl_mc_driver(rtc_drv);
1365 +
1366 +MODULE_LICENSE("GPL");
1367 +MODULE_DESCRIPTION("DPAA2 RTC (PTP 1588 clock) driver (prototype)");