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1 office 1 /*
2 * Device Tree Include file for Traverse LS1043S board.
3 *
4 * Copyright 2014-2015, Freescale Semiconductor
5 * Copyright 2017-2018, Traverse Technologies
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPLv2 or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This library is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This library is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45  
46 /dts-v1/;
47 #include "fsl-ls1043a.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
50  
51 / {
52 model = "Traverse LS1043S";
53 compatible = "traverse,ls1043s";
54  
55 aliases {
56 crypto = &crypto;
57 ethernet0 = &EMAC0;
58 ethernet1 = &EMAC1;
59 ethernet2 = &EMAC2;
60 ethernet3 = &EMAC3;
61 ethernet4 = &EMAC4;
62 ethernet5 = &EMAC5;
63 };
64  
65 leds {
66 compatible = "gpio-leds";
67 gpio0 {
68 label = "ls1043s:green:user0";
69 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
70 };
71 gpio1 {
72 label = "ls1043s:green:user1";
73 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
74 };
75 /* LED D17 */
76 gpio2 {
77 label = "ls1043s:green:wan";
78 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
79 };
80 gpio3 {
81 label = "ls1043s:yellow:wan";
82 gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
83 };
84 /* LED D18 */
85 gpio4 {
86 label = "ls1043s:green:mgmt";
87 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
88 };
89 gpio5 {
90 label = "ls1043s:yellow:mgmt";
91 gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
92 };
93 /* LED D6 */
94 gpio6 {
95 label = "ls1043s:green:user2";
96 gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
97 };
98  
99 /* SFP+ LEDs - these are for chassis
100 * with lightpipes only
101 */
102 teng_act {
103 label = "ls1043s:yellow:10gact";
104 gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
105 };
106  
107 teng_link {
108 label = "ls1043s:green:10glink";
109 gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
110 };
111 };
112  
113 keys {
114 compatible = "gpio-keys-polled";
115 #address-cells = <1>;
116 #size-cells = <0>;
117 poll-interval = <1000>;
118 /* This button may not be loaded on all boards */
119 button@0 {
120 label = "Front button";
121 linux,code = <KEY_SETUP>;
122 gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
123 };
124 /* This is wired to header S3 */
125 button@1 {
126 label = "Rear button";
127 linux,code = <KEY_WPS_BUTTON>;
128 gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
129 };
130 };
131 };
132  
133 &esdhc {
134 mmc-hs200-1_8v;
135 sd-uhs-sdr104;
136 sd-uhs-sdr50;
137 sd-uhs-sdr25;
138 sd-uhs-sdr12;
139 };
140  
141 &i2c0 {
142 status = "okay";
143 rtc@6f {
144 compatible = "intersil,isl1208";
145 reg = <0x6f>;
146 };
147  
148 sfp_pca9534: pca9534@24 {
149 compatible = "ti,tca9534", "nxp,pca9534";
150 gpio-controller;
151 #gpio-cells = <2>;
152 reg = <0x24>;
153 gpio-base = <100>;
154 };
155  
156 controller@50 {
157 compatible = "traverse,controller";
158 reg = <0x50>;
159 };
160  
161 ds125df111@18 {
162 compatible = "ti,ds125df111";
163 reg = <0x18>;
164 };
165  
166 emc1704@4c {
167 compatible = "microchip,emc1704";
168 reg = <0x4c>;
169 };
170  
171 pac1934@16 {
172 compatible = "microchip,pac1934";
173 reg = <0x16>;
174 /* Monitoring 3.3V, 5V, Vin/12V (voltage only), Vbat/RTC (voltage only) */
175 shunt-resistors = <4000 12000 0 0>;
176 };
177  
178 pmic@8 {
179 compatible = "freescale,mc34vr500";
180 reg = <0x08>;
181 };
182 };
183  
184 /* I2C Bus for SFP EEPROM and control
185 * These are multiplexed so
186 * they don't collide when loaded
187 */
188 &i2c3 {
189 status = "okay";
190 i2c-switch@70 {
191 compatible = "nxp,pca9540";
192 #address-cells = <1>;
193 #size-cells = <0>;
194 reg = <0x70>;
195  
196 gigsfp_i2c: i2c@0 {
197 #address-cells = <1>;
198 #size-cells = <0>;
199 reg = <0>;
200 };
201 tensfp_i2c: i2c@1 {
202 #address-cells = <1>;
203 #size-cells = <0>;
204 reg = <1>;
205 };
206 };
207 };
208  
209 &ifc {
210 status = "okay";
211 #address-cells = <2>;
212 #size-cells = <1>;
213 /* Only NAND flash is used on this board */
214 ranges = <0x0 0x0 0x0 0x7e800000 0x00010000>;
215  
216 nand@1,0 {
217 compatible = "fsl,ifc-nand";
218 #address-cells = <1>;
219 #size-cells = <1>;
220 reg = <0x0 0x0 0x10000>;
221 };
222 };
223  
224 &duart0 {
225 status = "okay";
226 };
227  
228 &duart1 {
229 status = "okay";
230 };
231  
232 #include "fsl-ls1043-post.dtsi"
233  
234 &fman0 {
235 EMAC0: ethernet@e0000 {
236 phy-handle = <&qsgmii_phy1>;
237 phy-connection-type = "qsgmii";
238 local-mac-address = [0A 00 00 00 00 01];
239 };
240  
241 EMAC1: ethernet@e2000 {
242 phy-handle = <&qsgmii_phy2>;
243 phy-connection-type = "qsgmii";
244 local-mac-address = [0A 00 00 00 00 02];
245 };
246  
247 EMAC2: ethernet@e8000 {
248 phy-handle = <&qsgmii_phy3>;
249 phy-connection-type = "qsgmii";
250 local-mac-address = [0A 00 00 00 00 03];
251 };
252  
253 EMAC3: ethernet@ea000 {
254 phy-handle = <&qsgmii_phy4>;
255 phy-connection-type = "qsgmii";
256 local-mac-address = [0A 00 00 00 00 04];
257 };
258  
259 /* SFP via AR8031
260 * We treat this as a fixed-link as the
261 * AR8031 is hard-configured into
262 * 1000BASE-X mode
263 * Should MII control be desired, remove
264 * fixed-link and add
265 * phy-handle = <&rgmii_phy1>;
266 */
267 EMAC4: ethernet@e4000 {
268 phy-connection-type = "rgmii";
269 local-mac-address = [0A 00 00 00 00 05];
270 fixed-link {
271 speed = <1000>;
272 full-duplex;
273 };
274 };
275  
276 /* Connection to Expansion (M.2) slot
277 * Future WAN (i.e xDSL) plugin
278 */
279 EMAC5: ethernet@e6000 {
280 phy-connection-type = "rgmii-id";
281 local-mac-address = [00 00 00 00 00 06];
282 fixed-link {
283 speed = <1000>;
284 full-duplex;
285 };
286 };
287  
288 /* 10G SFP+ interface
289 * This can also run at 1.25 and 2.5G with
290 * the appropriate SerDes protocol setting in RCW
291 */
292 TENSFP: ethernet@f0000 {
293 status = "okay";
294 phy-connection-type = "xgmii";
295 fixed-link {
296 speed = <10000>;
297 full-duplex;
298 };
299 };
300  
301 mdio@fc000 {
302 rgmii_phy1: ethernet-phy@2 {
303 reg = <0x2>;
304 };
305 qsgmii_phy1: ethernet-phy@4 {
306 reg = <0x4>;
307 };
308 qsgmii_phy2: ethernet-phy@5 {
309 reg = <0x5>;
310 };
311 qsgmii_phy3: ethernet-phy@6 {
312 reg = <0x6>;
313 };
314 qsgmii_phy4: ethernet-phy@7 {
315 reg = <0x7>;
316 };
317 };
318 };
319  
320 /* No QUICC engine functions on this board -
321 * pins are used for other functions (GPIO, I2C etc.)
322 */
323 &uqe {
324 status = "disabled";
325 };
326  
327 /* LS1043S does not use the QorIQ AHCI
328 * controller.
329 */
330 &sata {
331 status = "disabled";
332 };