OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "vr9.dtsi" |
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4 | |||
5 | #include <dt-bindings/input/input.h> |
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6 | #include <dt-bindings/mips/lantiq_rcu_gphy.h> |
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7 | |||
8 | / { |
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9 | compatible = "arcadyan,vg3503j", "lantiq,xway", "lantiq,vr9"; |
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10 | model = "BT OpenReach VDSL Modem"; |
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11 | |||
12 | chosen { |
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13 | bootargs = "console=ttyLTQ0,115200"; |
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14 | }; |
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15 | |||
16 | aliases { |
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17 | led-boot = &power_green; |
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18 | led-failsafe = &power_red; |
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19 | led-running = &power_green; |
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20 | |||
21 | led-dsl = &dsl; |
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22 | }; |
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23 | |||
24 | memory@0 { |
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25 | reg = <0x0 0x2000000>; |
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26 | }; |
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27 | |||
28 | gpio-keys-polled { |
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29 | compatible = "gpio-keys-polled"; |
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30 | #address-cells = <1>; |
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31 | #size-cells = <0>; |
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32 | poll-interval = <100>; |
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33 | reset { |
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34 | label = "reset"; |
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35 | gpios = <&gpio 6 GPIO_ACTIVE_LOW>; |
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36 | linux,code = <KEY_RESTART>; |
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37 | }; |
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38 | }; |
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39 | |||
40 | gpio-leds { |
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41 | compatible = "gpio-leds"; |
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42 | |||
43 | power_red: power2 { |
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44 | label = "vg3503j:red:power"; |
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45 | gpios = <&gpio 14 GPIO_ACTIVE_LOW>; |
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46 | }; |
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47 | dsl: dsl { |
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48 | label = "vg3503j:green:dsl"; |
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49 | gpios = <&gpio 19 GPIO_ACTIVE_LOW>; |
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50 | }; |
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51 | power_green: power { |
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52 | label = "vg3503j:green:power"; |
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53 | gpios = <&gpio 28 GPIO_ACTIVE_LOW>; |
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54 | default-state = "keep"; |
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55 | }; |
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56 | }; |
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57 | }; |
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58 | |||
59 | ð0 { |
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60 | interface@0 { |
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61 | compatible = "lantiq,xrx200-pdi"; |
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62 | #address-cells = <1>; |
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63 | #size-cells = <0>; |
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64 | reg = <0>; |
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65 | |||
66 | lantiq,switch; |
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67 | ethernet@2 { |
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68 | compatible = "lantiq,xrx200-pdi-port"; |
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69 | reg = <2>; |
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70 | phy-mode = "mii"; |
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71 | phy-handle = <&phy11>; |
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72 | }; |
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73 | ethernet@4 { |
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74 | compatible = "lantiq,xrx200-pdi-port"; |
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75 | reg = <4>; |
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76 | phy-mode = "mii"; |
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77 | phy-handle = <&phy13>; |
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78 | }; |
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79 | }; |
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80 | |||
81 | mdio@0 { |
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82 | #address-cells = <1>; |
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83 | #size-cells = <0>; |
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84 | compatible = "lantiq,xrx200-mdio"; |
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85 | reg = <0>; |
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86 | |||
87 | phy11: ethernet-phy@11 { |
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88 | reg = <0x11>; |
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89 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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90 | lantiq,led1h = <0x70>; |
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91 | lantiq,led1l = <0x00>; |
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92 | lantiq,led2h = <0x00>; |
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93 | lantiq,led2l = <0x03>; |
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94 | }; |
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95 | phy13: ethernet-phy@13 { |
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96 | reg = <0x13>; |
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97 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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98 | lantiq,led1h = <0x70>; |
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99 | lantiq,led1l = <0x00>; |
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100 | lantiq,led2h = <0x00>; |
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101 | lantiq,led2l = <0x03>; |
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102 | }; |
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103 | }; |
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104 | }; |
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105 | |||
106 | &gphy0 { |
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107 | lantiq,gphy-mode = <GPHY_MODE_GE>; |
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108 | }; |
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109 | |||
110 | &gphy1 { |
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111 | lantiq,gphy-mode = <GPHY_MODE_GE>; |
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112 | }; |
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113 | |||
114 | &gpio { |
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115 | pinctrl-names = "default"; |
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116 | pinctrl-0 = <&state_default>; |
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117 | |||
118 | state_default: pinmux { |
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119 | mdio { |
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120 | lantiq,groups = "mdio"; |
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121 | lantiq,function = "mdio"; |
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122 | }; |
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123 | gphy-leds { |
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124 | lantiq,groups = "gphy0 led0", "gphy0 led1", |
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125 | "gphy0 led2", "gphy1 led0", |
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126 | "gphy1 led1", "gphy1 led2"; |
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127 | lantiq,function = "gphy"; |
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128 | lantiq,pull = <2>; |
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129 | lantiq,open-drain = <0>; |
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130 | lantiq,output = <1>; |
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131 | }; |
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132 | }; |
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133 | }; |
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134 | |||
135 | &localbus { |
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136 | nor@0 { |
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137 | compatible = "lantiq,nor"; |
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138 | bank-width = <2>; |
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139 | reg = <0 0x0 0x2000000>; |
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140 | #address-cells = <1>; |
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141 | #size-cells = <1>; |
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142 | |||
143 | partitions { |
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144 | compatible = "fixed-partitions"; |
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145 | #address-cells = <1>; |
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146 | #size-cells = <1>; |
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147 | |||
148 | partition@0 { |
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149 | label = "uboot"; |
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150 | reg = <0x00000 0x20000>; |
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151 | }; |
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152 | |||
153 | partition@20000 { |
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154 | label = "firmware"; |
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155 | reg = <0x20000 0x7d0000>; |
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156 | }; |
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157 | |||
158 | partition@7f0000 { |
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159 | label = "uboot-env"; |
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160 | reg = <0x7f0000 0x10000>; |
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161 | }; |
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162 | }; |
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163 | }; |
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164 | }; |