OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | #include "vr9.dtsi" |
2 | |||
3 | #include <dt-bindings/input/input.h> |
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4 | #include <dt-bindings/mips/lantiq_rcu_gphy.h> |
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5 | |||
6 | / { |
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7 | compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9"; |
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8 | |||
9 | chosen { |
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10 | bootargs = "console=ttyLTQ0,115200"; |
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11 | }; |
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12 | |||
13 | aliases { |
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14 | led-boot = &power_green; |
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15 | led-failsafe = &power_red; |
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16 | led-running = &power_green; |
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17 | led-upgrade = &power_green; |
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18 | |||
19 | led-dsl = &dsl_green; |
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20 | led-internet = &internet_green; |
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21 | led-wifi = &wireless_green; |
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22 | }; |
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23 | |||
24 | memory@0 { |
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25 | reg = <0x0 0x8000000>; |
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26 | }; |
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27 | |||
28 | gpio-keys-polled { |
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29 | compatible = "gpio-keys-polled"; |
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30 | #address-cells = <1>; |
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31 | #size-cells = <0>; |
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32 | poll-interval = <100>; |
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33 | |||
34 | reset { |
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35 | label = "reset"; |
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36 | gpios = <&gpio 39 GPIO_ACTIVE_LOW>; |
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37 | linux,code = <KEY_RESTART>; |
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38 | }; |
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39 | |||
40 | rfkill { |
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41 | label = "rfkill"; |
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42 | gpios = <&gpio 1 GPIO_ACTIVE_LOW>; |
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43 | linux,code = <KEY_RFKILL>; |
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44 | }; |
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45 | }; |
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46 | |||
47 | gpio-leds { |
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48 | compatible = "gpio-leds"; |
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49 | |||
50 | internet_red { |
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51 | label = "p2812hnufx:red:internet"; |
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52 | gpios = <&stp 16 GPIO_ACTIVE_LOW>; |
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53 | }; |
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54 | internet_green: internet_green { |
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55 | label = "p2812hnufx:green:internet"; |
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56 | gpios = <&stp 17 GPIO_ACTIVE_LOW>; |
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57 | }; |
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58 | dsl_green: dsl_green { |
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59 | label = "p2812hnufx:green:dsl"; |
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60 | gpios = <&stp 18 GPIO_ACTIVE_LOW>; |
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61 | }; |
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62 | dsl_orange { |
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63 | label = "p2812hnufx:orange:dsl"; |
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64 | gpios = <&stp 19 GPIO_ACTIVE_LOW>; |
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65 | }; |
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66 | wireless_orange { |
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67 | label = "p2812hnufx:orange:wlan"; |
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68 | gpios = <&stp 20 GPIO_ACTIVE_LOW>; |
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69 | }; |
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70 | wireless_green: wireless_green { |
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71 | label = "p2812hnufx:green:wlan"; |
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72 | gpios = <&stp 21 GPIO_ACTIVE_LOW>; |
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73 | }; |
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74 | power_red: power { |
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75 | label = "p2812hnufx:red:power"; |
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76 | gpios = <&stp 22 GPIO_ACTIVE_LOW>; |
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77 | }; |
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78 | power_green: power2 { |
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79 | label = "p2812hnufx:green:power"; |
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80 | gpios = <&stp 23 GPIO_ACTIVE_LOW>; |
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81 | default-state = "keep"; |
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82 | }; |
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83 | phone1 { |
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84 | label = "p2812hnufx:green:phone"; |
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85 | gpios = <&gpio 11 GPIO_ACTIVE_LOW>; |
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86 | }; |
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87 | phone1warn { |
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88 | label = "p2812hnufx:orange:phone"; |
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89 | gpios = <&gpio 12 GPIO_ACTIVE_LOW>; |
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90 | }; |
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91 | phone2warn { |
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92 | label = "p2812hnufx:orange:phone2"; |
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93 | gpios = <&gpio 26 GPIO_ACTIVE_LOW>; |
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94 | }; |
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95 | phone2 { |
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96 | label = "p2812hnufx:green:phone2"; |
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97 | gpios = <&gpio 28 GPIO_ACTIVE_LOW>; |
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98 | }; |
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99 | }; |
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100 | |||
101 | usb_vbus: regulator-usb-vbus { |
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102 | compatible = "regulator-fixed"; |
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103 | |||
104 | regulator-name = "USB_VBUS"; |
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105 | |||
106 | regulator-min-microvolt = <5000000>; |
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107 | regulator-max-microvolt = <5000000>; |
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108 | |||
109 | gpio = <&gpio 33 GPIO_ACTIVE_HIGH>; |
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110 | enable-active-high; |
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111 | }; |
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112 | }; |
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113 | |||
114 | ð0 { |
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115 | lan: interface@0 { |
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116 | compatible = "lantiq,xrx200-pdi"; |
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117 | #address-cells = <1>; |
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118 | #size-cells = <0>; |
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119 | reg = <0>; |
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120 | mac-address = [ 00 11 22 33 44 55 ]; |
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121 | lantiq,switch; |
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122 | |||
123 | ethernet@0 { |
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124 | compatible = "lantiq,xrx200-pdi-port"; |
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125 | reg = <0>; |
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126 | phy-mode = "rgmii"; |
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127 | phy-handle = <&phy0>; |
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128 | }; |
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129 | ethernet@1 { |
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130 | compatible = "lantiq,xrx200-pdi-port"; |
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131 | reg = <1>; |
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132 | phy-mode = "rgmii"; |
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133 | phy-handle = <&phy1>; |
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134 | }; |
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135 | ethernet@2 { |
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136 | compatible = "lantiq,xrx200-pdi-port"; |
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137 | reg = <2>; |
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138 | phy-mode = "gmii"; |
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139 | phy-handle = <&phy11>; |
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140 | }; |
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141 | ethernet@4 { |
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142 | compatible = "lantiq,xrx200-pdi-port"; |
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143 | reg = <4>; |
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144 | phy-mode = "gmii"; |
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145 | phy-handle = <&phy13>; |
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146 | }; |
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147 | ethernet@5 { |
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148 | compatible = "lantiq,xrx200-pdi-port"; |
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149 | reg = <5>; |
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150 | phy-mode = "rgmii"; |
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151 | phy-handle = <&phy5>; |
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152 | }; |
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153 | }; |
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154 | |||
155 | mdio@0 { |
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156 | #address-cells = <1>; |
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157 | #size-cells = <0>; |
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158 | compatible = "lantiq,xrx200-mdio"; |
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159 | reg = <0>; |
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160 | |||
161 | phy0: ethernet-phy@0 { |
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162 | reg = <0x0>; |
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163 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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164 | }; |
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165 | phy1: ethernet-phy@1 { |
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166 | reg = <0x1>; |
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167 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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168 | }; |
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169 | phy5: ethernet-phy@5 { |
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170 | reg = <0x5>; |
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171 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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172 | }; |
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173 | phy11: ethernet-phy@11 { |
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174 | reg = <0x11>; |
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175 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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176 | }; |
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177 | phy13: ethernet-phy@13 { |
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178 | reg = <0x13>; |
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179 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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180 | }; |
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181 | }; |
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182 | }; |
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183 | |||
184 | &gphy0 { |
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185 | lantiq,gphy-mode = <GPHY_MODE_GE>; |
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186 | }; |
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187 | |||
188 | &gphy1 { |
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189 | lantiq,gphy-mode = <GPHY_MODE_GE>; |
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190 | }; |
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191 | |||
192 | &gpio { |
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193 | pinctrl-names = "default"; |
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194 | pinctrl-0 = <&state_default>; |
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195 | |||
196 | state_default: pinmux { |
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197 | exin3 { |
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198 | lantiq,groups = "exin3"; |
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199 | lantiq,function = "exin"; |
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200 | }; |
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201 | mdio { |
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202 | lantiq,groups = "mdio"; |
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203 | lantiq,function = "mdio"; |
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204 | }; |
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205 | gphy-leds { |
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206 | lantiq,groups = "gphy0 led1", "gphy1 led1", |
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207 | "gphy0 led2", "gphy1 led2"; |
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208 | lantiq,function = "gphy"; |
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209 | lantiq,pull = <2>; |
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210 | lantiq,open-drain = <0>; |
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211 | lantiq,output = <1>; |
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212 | }; |
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213 | stp { |
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214 | lantiq,groups = "stp"; |
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215 | lantiq,function = "stp"; |
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216 | lantiq,pull = <2>; |
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217 | lantiq,open-drain = <0>; |
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218 | lantiq,output = <1>; |
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219 | }; |
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220 | pci-in { |
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221 | lantiq,groups = "req1"; |
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222 | lantiq,function = "pci"; |
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223 | lantiq,output = <0>; |
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224 | lantiq,open-drain = <1>; |
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225 | lantiq,pull = <2>; |
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226 | }; |
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227 | pci-out { |
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228 | lantiq,groups = "gnt1"; |
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229 | lantiq,function = "pci"; |
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230 | lantiq,output = <1>; |
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231 | lantiq,open-drain = <0>; |
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232 | lantiq,pull = <0>; |
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233 | }; |
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234 | pci_rst { |
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235 | lantiq,pins = "io21"; |
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236 | lantiq,output = <1>; |
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237 | lantiq,open-drain = <0>; |
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238 | lantiq,pull = <2>; |
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239 | }; |
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240 | pcie-rst { |
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241 | lantiq,pins = "io38"; |
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242 | lantiq,pull = <0>; |
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243 | lantiq,output = <1>; |
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244 | }; |
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245 | ifxhcd-rst { |
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246 | lantiq,pins = "io33"; |
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247 | lantiq,pull = <0>; |
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248 | lantiq,open-drain = <0>; |
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249 | lantiq,output = <1>; |
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250 | }; |
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251 | nand_out { |
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252 | lantiq,groups = "nand cle", "nand ale"; |
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253 | lantiq,function = "ebu"; |
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254 | lantiq,output = <1>; |
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255 | lantiq,open-drain = <0>; |
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256 | lantiq,pull = <0>; |
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257 | }; |
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258 | nand_cs1 { |
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259 | lantiq,groups = "nand cs1"; |
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260 | lantiq,function = "ebu"; |
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261 | lantiq,open-drain = <0>; |
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262 | lantiq,pull = <0>; |
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263 | }; |
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264 | }; |
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265 | }; |
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266 | |||
267 | &pci0 { |
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268 | status = "okay"; |
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269 | gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; |
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270 | }; |
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271 | |||
272 | &stp { |
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273 | status = "okay"; |
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274 | |||
275 | lantiq,shadow = <0xffffff>; |
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276 | lantiq,groups = <0x7>; |
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277 | lantiq,dsl = <0x0>; |
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278 | lantiq,phy1 = <0x0>; |
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279 | lantiq,phy2 = <0x0>; |
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280 | }; |
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281 | |||
282 | &usb_phy0 { |
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283 | status = "okay"; |
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284 | }; |
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285 | |||
286 | &usb_phy1 { |
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287 | status = "okay"; |
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288 | }; |
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289 | |||
290 | &usb0 { |
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291 | status = "okay"; |
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292 | vbus-supply = <&usb_vbus>; |
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293 | }; |
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294 | |||
295 | &usb1 { |
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296 | status = "okay"; |
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297 | vbus-supply = <&usb_vbus>; |
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298 | }; |