OpenWrt – Blame information for rev 3

Subversion Repositories:
Rev:
Rev Author Line No. Line
1 office 1 /dts-v1/;
2  
3 #include "vr9.dtsi"
4  
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
7  
8 / {
9 compatible = "avm,fritz7360sl", "lantiq,xway", "lantiq,vr9";
3 office 10 model = "1&1 HomeServer";
1 office 11  
12 chosen {
13 bootargs = "console=ttyLTQ0,115200";
14 };
15  
16 aliases {
17 led-boot = &power_green;
18 led-failsafe = &power_red;
19 led-running = &power_green;
20  
21 led-dsl = &info_green;
22 led-wifi = &wifi;
23 };
24  
25 memory@0 {
26 reg = <0x0 0x8000000>;
27 };
28  
29 gpio-keys-polled {
30 compatible = "gpio-keys-polled";
31 #address-cells = <1>;
32 #size-cells = <0>;
33 poll-interval = <100>;
34 dect {
35 label = "dect";
36 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
37 linux,code = <KEY_PHONE>;
38 };
39 wifi {
40 label = "wifi";
41 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
42 linux,code = <KEY_WLAN>;
43 };
44 };
45  
46 gpio-leds {
47 compatible = "gpio-leds";
48  
49 power_green: power {
50 label = "fritz7360sl:green:power";
51 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
52 default-state = "keep";
53 };
54 power_red: power2 {
55 label = "fritz7360sl:red:power";
56 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
57 };
58 info_red {
59 label = "fritz7360sl:red:info";
60 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
61 };
62 info_green: info_green {
63 label = "fritz7360sl:green:info";
64 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
65 };
66 wifi: wifi {
67 label = "fritz7360sl:green:wlan";
68 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
69 };
70 dect {
71 label = "fritz7360sl:green:dect";
72 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
73 };
74 };
75 };
76  
77 &eth0 {
78 lan: interface@0 {
79 compatible = "lantiq,xrx200-pdi";
80 #address-cells = <1>;
81 #size-cells = <0>;
82 reg = <0>;
83 mtd-mac-address = <&urlader 0xa91>;
84 mtd-mac-address-increment = <(-2)>;
85 lantiq,switch;
86  
87 ethernet@0 {
88 compatible = "lantiq,xrx200-pdi-port";
89 reg = <0>;
90 phy-mode = "rmii";
91 phy-handle = <&phy0>;
92 };
93 ethernet@1 {
94 compatible = "lantiq,xrx200-pdi-port";
95 reg = <1>;
96 phy-mode = "rmii";
97 phy-handle = <&phy1>;
98 };
99 ethernet@2 {
100 compatible = "lantiq,xrx200-pdi-port";
101 reg = <2>;
102 phy-mode = "gmii";
103 phy-handle = <&phy11>;
104 };
105 ethernet@3 {
106 compatible = "lantiq,xrx200-pdi-port";
107 reg = <4>;
108 phy-mode = "gmii";
109 phy-handle = <&phy13>;
110 };
111 };
112  
113 mdio@0 {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 compatible = "lantiq,xrx200-mdio";
117 reg = <0>;
118  
119 phy0: ethernet-phy@0 {
120 reg = <0x00>;
121 compatible = "ethernet-phy-ieee802.3-c22";
122 reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
123 };
124 phy1: ethernet-phy@1 {
125 reg = <0x01>;
126 compatible = "ethernet-phy-ieee802.3-c22";
127 reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
128 };
129 phy11: ethernet-phy@11 {
130 reg = <0x11>;
131 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
132 };
133 phy13: ethernet-phy@13 {
134 reg = <0x13>;
135 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
136 };
137 };
138 };
139  
140 &gphy0 {
141 lantiq,gphy-mode = <GPHY_MODE_GE>;
142 };
143  
144 &gphy1 {
145 lantiq,gphy-mode = <GPHY_MODE_GE>;
146 };
147  
148 &gpio {
149 pinctrl-names = "default";
150 pinctrl-0 = <&state_default>;
151  
152 state_default: pinmux {
153 mdio {
154 lantiq,groups = "mdio";
155 lantiq,function = "mdio";
156 };
157 phy-rst {
158 lantiq,pins = "io37", "io44";
159 lantiq,pull = <0>;
160 lantiq,open-drain;
161 lantiq,output = <1>;
162 };
163 pcie-rst {
164 lantiq,pins = "io38";
165 lantiq,pull = <0>;
166 lantiq,output = <1>;
167 };
168 };
169 };
170  
171 &localbus {
172 nor@0 {
173 compatible = "lantiq,nor";
174 bank-width = <2>;
175 reg = <0 0x0 0x1000000>;
176 #address-cells = <1>;
177 #size-cells = <1>;
178  
179 partitions {
180 compatible = "fixed-partitions";
181 #address-cells = <1>;
182 #size-cells = <1>;
183 urlader: partition@0 {
184 label = "urlader";
185 reg = <0x00000 0x20000>;
186 read-only;
187 };
188  
189 partition@20000 {
190 label = "firmware";
191 reg = <0x20000 0xf60000>;
192 };
193  
194 partition@f80000 {
195 label = "tffs (1)";
196 reg = <0xf80000 0x40000>;
197 read-only;
198 };
199  
200 partition@fc0000 {
201 label = "tffs (2)";
202 reg = <0xfc0000 0x40000>;
203 read-only;
204 };
205 };
206 };
207 };
208  
209 &pcie0 {
210 pcie@0 {
211 reg = <0 0 0 0 0>;
212 #interrupt-cells = <1>;
213 #size-cells = <2>;
214 #address-cells = <3>;
215 device_type = "pci";
216  
217 wifi@168c,002e {
218 compatible = "pci168c,002e";
219 reg = <0 0 0 0 0>;
220 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
221 };
222 };
223 };
224  
225 &usb_phy0 {
226 status = "okay";
227 };
228  
229 &usb_phy1 {
230 status = "okay";
231 };
232  
233 &usb0 {
234 status = "okay";
235 };
236  
237 &usb1 {
238 status = "okay";
239 };