OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "vr9.dtsi" |
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4 | |||
5 | #include <dt-bindings/input/input.h> |
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6 | #include <dt-bindings/mips/lantiq_rcu_gphy.h> |
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7 | |||
8 | / { |
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9 | compatible = "avm,fritz7360sl", "lantiq,xway", "lantiq,vr9"; |
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3 | office | 10 | model = "1&1 HomeServer"; |
1 | office | 11 | |
12 | chosen { |
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13 | bootargs = "console=ttyLTQ0,115200"; |
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14 | }; |
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15 | |||
16 | aliases { |
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17 | led-boot = &power_green; |
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18 | led-failsafe = &power_red; |
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19 | led-running = &power_green; |
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20 | |||
21 | led-dsl = &info_green; |
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22 | led-wifi = &wifi; |
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23 | }; |
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24 | |||
25 | memory@0 { |
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26 | reg = <0x0 0x8000000>; |
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27 | }; |
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28 | |||
29 | gpio-keys-polled { |
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30 | compatible = "gpio-keys-polled"; |
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31 | #address-cells = <1>; |
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32 | #size-cells = <0>; |
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33 | poll-interval = <100>; |
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34 | dect { |
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35 | label = "dect"; |
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36 | gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; |
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37 | linux,code = <KEY_PHONE>; |
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38 | }; |
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39 | wifi { |
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40 | label = "wifi"; |
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41 | gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; |
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42 | linux,code = <KEY_WLAN>; |
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43 | }; |
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44 | }; |
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45 | |||
46 | gpio-leds { |
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47 | compatible = "gpio-leds"; |
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48 | |||
49 | power_green: power { |
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50 | label = "fritz7360sl:green:power"; |
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51 | gpios = <&gpio 32 GPIO_ACTIVE_LOW>; |
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52 | default-state = "keep"; |
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53 | }; |
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54 | power_red: power2 { |
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55 | label = "fritz7360sl:red:power"; |
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56 | gpios = <&gpio 33 GPIO_ACTIVE_LOW>; |
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57 | }; |
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58 | info_red { |
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59 | label = "fritz7360sl:red:info"; |
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60 | gpios = <&gpio 34 GPIO_ACTIVE_LOW>; |
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61 | }; |
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62 | info_green: info_green { |
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63 | label = "fritz7360sl:green:info"; |
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64 | gpios = <&gpio 47 GPIO_ACTIVE_LOW>; |
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65 | }; |
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66 | wifi: wifi { |
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67 | label = "fritz7360sl:green:wlan"; |
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68 | gpios = <&gpio 36 GPIO_ACTIVE_LOW>; |
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69 | }; |
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70 | dect { |
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71 | label = "fritz7360sl:green:dect"; |
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72 | gpios = <&gpio 35 GPIO_ACTIVE_LOW>; |
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73 | }; |
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74 | }; |
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75 | }; |
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76 | |||
77 | ð0 { |
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78 | lan: interface@0 { |
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79 | compatible = "lantiq,xrx200-pdi"; |
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80 | #address-cells = <1>; |
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81 | #size-cells = <0>; |
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82 | reg = <0>; |
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83 | mtd-mac-address = <&urlader 0xa91>; |
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84 | mtd-mac-address-increment = <(-2)>; |
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85 | lantiq,switch; |
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86 | |||
87 | ethernet@0 { |
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88 | compatible = "lantiq,xrx200-pdi-port"; |
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89 | reg = <0>; |
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90 | phy-mode = "rmii"; |
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91 | phy-handle = <&phy0>; |
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92 | }; |
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93 | ethernet@1 { |
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94 | compatible = "lantiq,xrx200-pdi-port"; |
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95 | reg = <1>; |
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96 | phy-mode = "rmii"; |
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97 | phy-handle = <&phy1>; |
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98 | }; |
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99 | ethernet@2 { |
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100 | compatible = "lantiq,xrx200-pdi-port"; |
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101 | reg = <2>; |
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102 | phy-mode = "gmii"; |
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103 | phy-handle = <&phy11>; |
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104 | }; |
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105 | ethernet@3 { |
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106 | compatible = "lantiq,xrx200-pdi-port"; |
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107 | reg = <4>; |
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108 | phy-mode = "gmii"; |
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109 | phy-handle = <&phy13>; |
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110 | }; |
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111 | }; |
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112 | |||
113 | mdio@0 { |
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114 | #address-cells = <1>; |
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115 | #size-cells = <0>; |
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116 | compatible = "lantiq,xrx200-mdio"; |
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117 | reg = <0>; |
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118 | |||
119 | phy0: ethernet-phy@0 { |
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120 | reg = <0x00>; |
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121 | compatible = "ethernet-phy-ieee802.3-c22"; |
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122 | reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>; |
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123 | }; |
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124 | phy1: ethernet-phy@1 { |
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125 | reg = <0x01>; |
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126 | compatible = "ethernet-phy-ieee802.3-c22"; |
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127 | reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; |
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128 | }; |
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129 | phy11: ethernet-phy@11 { |
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130 | reg = <0x11>; |
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131 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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132 | }; |
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133 | phy13: ethernet-phy@13 { |
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134 | reg = <0x13>; |
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135 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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136 | }; |
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137 | }; |
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138 | }; |
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139 | |||
140 | &gphy0 { |
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141 | lantiq,gphy-mode = <GPHY_MODE_GE>; |
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142 | }; |
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143 | |||
144 | &gphy1 { |
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145 | lantiq,gphy-mode = <GPHY_MODE_GE>; |
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146 | }; |
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147 | |||
148 | &gpio { |
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149 | pinctrl-names = "default"; |
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150 | pinctrl-0 = <&state_default>; |
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151 | |||
152 | state_default: pinmux { |
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153 | mdio { |
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154 | lantiq,groups = "mdio"; |
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155 | lantiq,function = "mdio"; |
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156 | }; |
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157 | phy-rst { |
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158 | lantiq,pins = "io37", "io44"; |
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159 | lantiq,pull = <0>; |
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160 | lantiq,open-drain; |
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161 | lantiq,output = <1>; |
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162 | }; |
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163 | pcie-rst { |
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164 | lantiq,pins = "io38"; |
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165 | lantiq,pull = <0>; |
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166 | lantiq,output = <1>; |
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167 | }; |
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168 | }; |
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169 | }; |
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170 | |||
171 | &localbus { |
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172 | nor@0 { |
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173 | compatible = "lantiq,nor"; |
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174 | bank-width = <2>; |
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175 | reg = <0 0x0 0x1000000>; |
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176 | #address-cells = <1>; |
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177 | #size-cells = <1>; |
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178 | |||
179 | partitions { |
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180 | compatible = "fixed-partitions"; |
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181 | #address-cells = <1>; |
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182 | #size-cells = <1>; |
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183 | urlader: partition@0 { |
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184 | label = "urlader"; |
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185 | reg = <0x00000 0x20000>; |
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186 | read-only; |
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187 | }; |
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188 | |||
189 | partition@20000 { |
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190 | label = "firmware"; |
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191 | reg = <0x20000 0xf60000>; |
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192 | }; |
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193 | |||
194 | partition@f80000 { |
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195 | label = "tffs (1)"; |
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196 | reg = <0xf80000 0x40000>; |
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197 | read-only; |
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198 | }; |
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199 | |||
200 | partition@fc0000 { |
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201 | label = "tffs (2)"; |
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202 | reg = <0xfc0000 0x40000>; |
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203 | read-only; |
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204 | }; |
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205 | }; |
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206 | }; |
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207 | }; |
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208 | |||
209 | &pcie0 { |
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210 | pcie@0 { |
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211 | reg = <0 0 0 0 0>; |
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212 | #interrupt-cells = <1>; |
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213 | #size-cells = <2>; |
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214 | #address-cells = <3>; |
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215 | device_type = "pci"; |
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216 | |||
217 | wifi@168c,002e { |
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218 | compatible = "pci168c,002e"; |
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219 | reg = <0 0 0 0 0>; |
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220 | qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */ |
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221 | }; |
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222 | }; |
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223 | }; |
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224 | |||
225 | &usb_phy0 { |
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226 | status = "okay"; |
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227 | }; |
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228 | |||
229 | &usb_phy1 { |
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230 | status = "okay"; |
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231 | }; |
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232 | |||
233 | &usb0 { |
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234 | status = "okay"; |
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235 | }; |
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236 | |||
237 | &usb1 { |
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238 | status = "okay"; |
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239 | }; |