OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From: Gabor Juhos <juhosg@openwrt.org> |
2 | Subject: debloat: add kernel config option to disabling common PCI quirks |
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3 | |||
4 | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> |
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5 | --- |
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6 | drivers/pci/Kconfig | 6 ++++++ |
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7 | drivers/pci/quirks.c | 6 ++++++ |
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8 | 2 files changed, 12 insertions(+) |
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9 | |||
10 | --- a/drivers/pci/Kconfig |
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11 | +++ b/drivers/pci/Kconfig |
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12 | @@ -71,6 +71,12 @@ config XEN_PCIDEV_FRONTEND |
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13 | The PCI device frontend driver allows the kernel to import arbitrary |
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14 | PCI devices from a PCI backend to support PCI driver domains. |
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15 | |||
16 | +config PCI_DISABLE_COMMON_QUIRKS |
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17 | + bool "PCI disable common quirks" |
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18 | + depends on PCI |
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19 | + help |
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20 | + If you don't know what to do here, say N. |
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21 | + |
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22 | config HT_IRQ |
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23 | bool "Interrupts on hypertransport devices" |
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24 | default y |
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25 | --- a/drivers/pci/quirks.c |
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26 | +++ b/drivers/pci/quirks.c |
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27 | @@ -41,6 +41,7 @@ static void quirk_mmio_always_on(struct |
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28 | DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, |
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29 | PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on); |
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30 | |||
31 | +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS |
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32 | /* The Mellanox Tavor device gives false positive parity errors |
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33 | * Mark this device with a broken_parity_status, to allow |
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34 | * PCI scanning code to "skip" this now blacklisted device. |
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35 | @@ -3038,6 +3039,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I |
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36 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); |
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37 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); |
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38 | |||
39 | +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ |
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40 | |||
41 | /* |
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42 | * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. To |
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43 | @@ -3094,6 +3096,8 @@ static void fixup_debug_report(struct pc |
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44 | } |
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45 | } |
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46 | |||
47 | +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS |
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48 | + |
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49 | /* |
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50 | * Some BIOS implementations leave the Intel GPU interrupts enabled, |
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51 | * even though no one is handling them (f.e. i915 driver is never loaded). |
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52 | @@ -3132,6 +3136,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN |
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53 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); |
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54 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq); |
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55 | |||
56 | +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ |
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57 | + |
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58 | /* |
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59 | * PCI devices which are on Intel chips can skip the 10ms delay |
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60 | * before entering D3 mode. |