OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | From: Felix Fietkau <nbd@nbd.name> |
2 | Date: Tue, 5 Dec 2017 12:46:01 +0100 |
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3 | Subject: [PATCH] MIPS: mm: remove no-op dma_map_ops where possible |
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4 | |||
5 | If no post-DMA flush is required, and the platform does not provide |
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6 | plat_unmap_dma_mem(), there is no need to include unmap or sync_for_cpu |
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7 | ops. |
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8 | |||
9 | With this patch they are compiled out to improve icache footprint |
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10 | on devices that handle lots of DMA traffic (especially network routers). |
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11 | |||
12 | Signed-off-by: Felix Fietkau <nbd@nbd.name> |
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13 | --- |
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14 | |||
15 | --- a/arch/mips/Kconfig |
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16 | +++ b/arch/mips/Kconfig |
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17 | @@ -214,6 +214,7 @@ config BMIPS_GENERIC |
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18 | select BRCMSTB_L2_IRQ |
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19 | select IRQ_MIPS_CPU |
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20 | select DMA_NONCOHERENT |
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21 | + select DMA_UNMAP_POST_FLUSH |
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22 | select SYS_SUPPORTS_32BIT_KERNEL |
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23 | select SYS_SUPPORTS_LITTLE_ENDIAN |
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24 | select SYS_SUPPORTS_BIG_ENDIAN |
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25 | @@ -339,6 +340,7 @@ config MACH_JAZZ |
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26 | select CSRC_R4K |
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27 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
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28 | select GENERIC_ISA_DMA |
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29 | + select DMA_UNMAP_POST_FLUSH |
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30 | select HAVE_PCSPKR_PLATFORM |
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31 | select IRQ_MIPS_CPU |
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32 | select I8253 |
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3 | office | 33 | @@ -1126,6 +1128,9 @@ config DMA_NONCOHERENT |
1 | office | 34 | bool |
35 | select NEED_DMA_MAP_STATE |
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36 | |||
37 | +config DMA_UNMAP_POST_FLUSH |
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38 | + bool |
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39 | + |
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40 | config NEED_DMA_MAP_STATE |
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41 | bool |
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42 | |||
3 | office | 43 | @@ -1650,6 +1655,7 @@ config CPU_R10000 |
1 | office | 44 | select CPU_SUPPORTS_64BIT_KERNEL |
45 | select CPU_SUPPORTS_HIGHMEM |
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46 | select CPU_SUPPORTS_HUGEPAGES |
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47 | + select DMA_UNMAP_POST_FLUSH |
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48 | help |
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49 | MIPS Technologies R10000-series processors. |
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50 | |||
3 | office | 51 | @@ -1895,9 +1901,11 @@ config SYS_HAS_CPU_MIPS32_R3_5 |
1 | office | 52 | bool |
53 | |||
54 | config SYS_HAS_CPU_MIPS32_R5 |
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55 | + select DMA_UNMAP_POST_FLUSH |
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56 | bool |
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57 | |||
58 | config SYS_HAS_CPU_MIPS32_R6 |
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59 | + select DMA_UNMAP_POST_FLUSH |
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60 | bool |
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61 | |||
62 | config SYS_HAS_CPU_MIPS64_R1 |
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3 | office | 63 | @@ -1907,6 +1915,7 @@ config SYS_HAS_CPU_MIPS64_R2 |
1 | office | 64 | bool |
65 | |||
66 | config SYS_HAS_CPU_MIPS64_R6 |
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67 | + select DMA_UNMAP_POST_FLUSH |
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68 | bool |
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69 | |||
70 | config SYS_HAS_CPU_R3000 |
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71 | --- a/arch/mips/mm/dma-default.c |
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72 | +++ b/arch/mips/mm/dma-default.c |
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73 | @@ -290,8 +290,9 @@ static inline void __dma_sync(struct pag |
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74 | } while (left); |
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75 | } |
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76 | |||
77 | -static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr, |
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78 | - size_t size, enum dma_data_direction direction, unsigned long attrs) |
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79 | +static void __maybe_unused |
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80 | +mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, |
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81 | + enum dma_data_direction direction, unsigned long attrs) |
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82 | { |
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83 | if (cpu_needs_post_dma_flush(dev)) |
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84 | __dma_sync(dma_addr_to_page(dev, dma_addr), |
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85 | @@ -330,9 +331,10 @@ static dma_addr_t mips_dma_map_page(stru |
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86 | return plat_map_dma_mem_page(dev, page) + offset; |
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87 | } |
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88 | |||
89 | -static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, |
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90 | - int nhwentries, enum dma_data_direction direction, |
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91 | - unsigned long attrs) |
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92 | +static void __maybe_unused |
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93 | +mips_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, |
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94 | + int nhwentries, enum dma_data_direction direction, |
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95 | + unsigned long attrs) |
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96 | { |
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97 | int i; |
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98 | struct scatterlist *sg; |
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99 | @@ -346,8 +348,9 @@ static void mips_dma_unmap_sg(struct dev |
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100 | } |
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101 | } |
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102 | |||
103 | -static void mips_dma_sync_single_for_cpu(struct device *dev, |
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104 | - dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) |
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105 | +static void __maybe_unused |
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106 | +mips_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, |
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107 | + size_t size, enum dma_data_direction direction) |
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108 | { |
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109 | if (cpu_needs_post_dma_flush(dev)) |
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110 | __dma_sync(dma_addr_to_page(dev, dma_handle), |
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111 | @@ -363,9 +366,9 @@ static void mips_dma_sync_single_for_dev |
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112 | dma_handle & ~PAGE_MASK, size, direction); |
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113 | } |
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114 | |||
115 | -static void mips_dma_sync_sg_for_cpu(struct device *dev, |
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116 | - struct scatterlist *sglist, int nelems, |
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117 | - enum dma_data_direction direction) |
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118 | +static void __maybe_unused |
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119 | +mips_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, |
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120 | + int nelems, enum dma_data_direction direction) |
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121 | { |
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122 | int i; |
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123 | struct scatterlist *sg; |
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124 | @@ -415,12 +418,14 @@ static struct dma_map_ops mips_default_d |
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125 | .free = mips_dma_free_coherent, |
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126 | .mmap = mips_dma_mmap, |
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127 | .map_page = mips_dma_map_page, |
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128 | - .unmap_page = mips_dma_unmap_page, |
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129 | .map_sg = mips_dma_map_sg, |
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130 | +#ifdef CONFIG_DMA_UNMAP_POST_FLUSH |
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131 | + .unmap_page = mips_dma_unmap_page, |
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132 | .unmap_sg = mips_dma_unmap_sg, |
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133 | .sync_single_for_cpu = mips_dma_sync_single_for_cpu, |
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134 | - .sync_single_for_device = mips_dma_sync_single_for_device, |
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135 | .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu, |
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136 | +#endif |
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137 | + .sync_single_for_device = mips_dma_sync_single_for_device, |
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138 | .sync_sg_for_device = mips_dma_sync_sg_for_device, |
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139 | .dma_supported = mips_dma_supported |
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140 | }; |