OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From: Gabor Juhos <juhosg@openwrt.org> |
2 | Subject: debloat: add kernel config option to disabling common PCI quirks |
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3 | |||
4 | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> |
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5 | --- |
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6 | drivers/pci/Kconfig | 6 ++++++ |
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7 | drivers/pci/quirks.c | 6 ++++++ |
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8 | 2 files changed, 12 insertions(+) |
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9 | |||
10 | --- a/drivers/pci/Kconfig |
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11 | +++ b/drivers/pci/Kconfig |
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12 | @@ -89,6 +89,13 @@ config XEN_PCIDEV_FRONTEND |
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13 | The PCI device frontend driver allows the kernel to import arbitrary |
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14 | PCI devices from a PCI backend to support PCI driver domains. |
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15 | |||
16 | +config PCI_DISABLE_COMMON_QUIRKS |
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17 | + bool "PCI disable common quirks" |
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18 | + depends on PCI |
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19 | + help |
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20 | + If you don't know what to do here, say N. |
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21 | + |
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22 | + |
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23 | config PCI_ATS |
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24 | bool |
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25 | |||
26 | --- a/drivers/pci/quirks.c |
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27 | +++ b/drivers/pci/quirks.c |
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28 | @@ -207,6 +207,7 @@ static void quirk_mmio_always_on(struct |
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29 | DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, |
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30 | PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on); |
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31 | |||
32 | +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS |
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33 | /* |
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34 | * The Mellanox Tavor device gives false positive parity errors. Mark this |
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35 | * device with a broken_parity_status to allow PCI scanning code to "skip" |
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36 | @@ -3135,6 +3136,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I |
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37 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); |
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38 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); |
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39 | |||
40 | +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ |
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41 | + |
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42 | /* |
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43 | * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. |
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44 | * To work around this, query the size it should be configured to by the |
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45 | @@ -3160,6 +3163,8 @@ static void quirk_intel_ntb(struct pci_d |
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46 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb); |
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47 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb); |
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48 | |||
49 | +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS |
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50 | + |
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51 | /* |
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52 | * Some BIOS implementations leave the Intel GPU interrupts enabled, even |
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53 | * though no one is handling them (e.g., if the i915 driver is never |
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54 | @@ -3198,6 +3203,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN |
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55 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); |
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56 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq); |
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57 | |||
58 | +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ |
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59 | + |
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60 | /* |
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61 | * PCI devices which are on Intel chips can skip the 10ms delay |
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62 | * before entering D3 mode. |