OpenWrt – Blame information for rev 2
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1 | office | 1 | From 05aba5763dcf35eddc58aaf99c9f16d19730e0a8 Mon Sep 17 00:00:00 2001 |
2 | From: Cyrille Pitchen <cyrille.pitchen@atmel.com> |
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3 | Date: Thu, 27 Oct 2016 11:55:39 +0200 |
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4 | Subject: [PATCH] mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address |
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5 | op codes |
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6 | |||
7 | This patch renames the SPINOR_OP_* macros of the 4-byte address |
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8 | instruction set so the new names all share a common pattern: the 4-byte |
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9 | address name is built from the 3-byte address name appending the "_4B" |
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10 | suffix. |
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11 | |||
12 | The patch also introduces new op codes to support other SPI protocols such |
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13 | as SPI 1-4-4 and SPI 1-2-2. |
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14 | |||
15 | This is a transitional patch and will help a later patch of spi-nor.c |
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16 | to automate the translation from the 3-byte address op codes into their |
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17 | 4-byte address version. |
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18 | |||
19 | Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> |
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20 | Acked-by: Mark Brown <broonie@kernel.org> |
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21 | Acked-by: Marek Vasut <marek.vasut@gmail.com> |
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22 | --- |
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23 | drivers/mtd/devices/serial_flash_cmds.h | 7 ------- |
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24 | drivers/mtd/devices/st_spi_fsm.c | 28 ++++++++++++++-------------- |
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25 | drivers/mtd/spi-nor/spi-nor.c | 8 ++++---- |
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26 | drivers/spi/spi-bcm-qspi.c | 6 +++--- |
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27 | include/linux/mtd/spi-nor.h | 22 ++++++++++++++++------ |
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28 | 5 files changed, 37 insertions(+), 34 deletions(-) |
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29 | |||
30 | --- a/drivers/mtd/devices/serial_flash_cmds.h |
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31 | +++ b/drivers/mtd/devices/serial_flash_cmds.h |
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32 | @@ -18,19 +18,12 @@ |
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33 | #define SPINOR_OP_RDVCR 0x85 |
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34 | |||
35 | /* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */ |
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36 | -#define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */ |
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37 | -#define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */ |
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38 | - |
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39 | #define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */ |
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40 | #define SPINOR_OP_WRITE_1_1_2 0xa2 /* DUAL INPUT PROGRAM */ |
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41 | #define SPINOR_OP_WRITE_1_2_2 0xd2 /* DUAL INPUT EXT PROGRAM */ |
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42 | #define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */ |
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43 | #define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */ |
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44 | |||
45 | -/* READ commands with 32-bit addressing */ |
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46 | -#define SPINOR_OP_READ4_1_2_2 0xbc |
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47 | -#define SPINOR_OP_READ4_1_4_4 0xec |
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48 | - |
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49 | /* Configuration flags */ |
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50 | #define FLASH_FLAG_SINGLE 0x000000ff |
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51 | #define FLASH_FLAG_READ_WRITE 0x00000001 |
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52 | --- a/drivers/mtd/devices/st_spi_fsm.c |
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53 | +++ b/drivers/mtd/devices/st_spi_fsm.c |
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54 | @@ -507,13 +507,13 @@ static struct seq_rw_config n25q_read3_c |
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55 | * - 'FAST' variants configured for 8 dummy cycles (see note above.) |
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56 | */ |
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57 | static struct seq_rw_config n25q_read4_configs[] = { |
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58 | - {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 0, 8}, |
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59 | - {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8}, |
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60 | - {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 0, 8}, |
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61 | - {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8}, |
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62 | - {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8}, |
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63 | - {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0}, |
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64 | - {0x00, 0, 0, 0, 0, 0x00, 0, 0}, |
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65 | + {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 0, 8}, |
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66 | + {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8}, |
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67 | + {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 0, 8}, |
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68 | + {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8}, |
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69 | + {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8}, |
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70 | + {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0}, |
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71 | + {0x00, 0, 0, 0, 0, 0x00, 0, 0}, |
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72 | }; |
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73 | |||
74 | /* |
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75 | @@ -553,13 +553,13 @@ static int stfsm_mx25_en_32bit_addr_seq( |
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76 | * entering a state that is incompatible with the SPIBoot Controller. |
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77 | */ |
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78 | static struct seq_rw_config stfsm_s25fl_read4_configs[] = { |
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79 | - {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 2, 4}, |
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80 | - {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8}, |
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81 | - {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 4, 0}, |
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82 | - {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8}, |
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83 | - {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8}, |
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84 | - {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0}, |
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85 | - {0x00, 0, 0, 0, 0, 0x00, 0, 0}, |
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86 | + {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 2, 4}, |
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87 | + {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8}, |
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88 | + {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 4, 0}, |
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89 | + {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8}, |
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90 | + {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8}, |
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91 | + {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0}, |
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92 | + {0x00, 0, 0, 0, 0, 0x00, 0, 0}, |
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93 | }; |
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94 | |||
95 | static struct seq_rw_config stfsm_s25fl_write4_configs[] = { |
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96 | --- a/drivers/mtd/spi-nor/spi-nor.c |
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97 | +++ b/drivers/mtd/spi-nor/spi-nor.c |
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98 | @@ -1638,16 +1638,16 @@ int spi_nor_scan(struct spi_nor *nor, co |
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99 | /* Dedicated 4-byte command set */ |
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100 | switch (nor->flash_read) { |
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101 | case SPI_NOR_QUAD: |
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102 | - nor->read_opcode = SPINOR_OP_READ4_1_1_4; |
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103 | + nor->read_opcode = SPINOR_OP_READ_1_1_4_4B; |
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104 | break; |
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105 | case SPI_NOR_DUAL: |
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106 | - nor->read_opcode = SPINOR_OP_READ4_1_1_2; |
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107 | + nor->read_opcode = SPINOR_OP_READ_1_1_2_4B; |
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108 | break; |
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109 | case SPI_NOR_FAST: |
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110 | - nor->read_opcode = SPINOR_OP_READ4_FAST; |
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111 | + nor->read_opcode = SPINOR_OP_READ_FAST_4B; |
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112 | break; |
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113 | case SPI_NOR_NORMAL: |
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114 | - nor->read_opcode = SPINOR_OP_READ4; |
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115 | + nor->read_opcode = SPINOR_OP_READ_4B; |
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116 | break; |
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117 | } |
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118 | nor->program_opcode = SPINOR_OP_PP_4B; |
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119 | --- a/drivers/spi/spi-bcm-qspi.c |
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120 | +++ b/drivers/spi/spi-bcm-qspi.c |
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121 | @@ -371,7 +371,7 @@ static int bcm_qspi_bspi_set_flex_mode(s |
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122 | /* default mode, does not need flex_cmd */ |
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123 | flex_mode = 0; |
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124 | else |
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125 | - command = SPINOR_OP_READ4_FAST; |
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126 | + command = SPINOR_OP_READ_FAST_4B; |
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127 | break; |
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128 | case SPI_NBITS_DUAL: |
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129 | bpc = 0x00000001; |
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130 | @@ -384,7 +384,7 @@ static int bcm_qspi_bspi_set_flex_mode(s |
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131 | } else { |
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132 | command = SPINOR_OP_READ_1_1_2; |
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133 | if (spans_4byte) |
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134 | - command = SPINOR_OP_READ4_1_1_2; |
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135 | + command = SPINOR_OP_READ_1_1_2_4B; |
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136 | } |
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137 | break; |
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138 | case SPI_NBITS_QUAD: |
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139 | @@ -399,7 +399,7 @@ static int bcm_qspi_bspi_set_flex_mode(s |
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140 | } else { |
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141 | command = SPINOR_OP_READ_1_1_4; |
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142 | if (spans_4byte) |
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143 | - command = SPINOR_OP_READ4_1_1_4; |
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144 | + command = SPINOR_OP_READ_1_1_4_4B; |
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145 | } |
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146 | break; |
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147 | default: |
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148 | --- a/include/linux/mtd/spi-nor.h |
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149 | +++ b/include/linux/mtd/spi-nor.h |
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150 | @@ -43,9 +43,13 @@ |
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151 | #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */ |
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152 | #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */ |
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153 | #define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */ |
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154 | -#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */ |
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155 | -#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */ |
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156 | +#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */ |
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157 | +#define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */ |
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158 | +#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */ |
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159 | +#define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */ |
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160 | #define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */ |
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161 | +#define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */ |
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162 | +#define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */ |
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163 | #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */ |
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164 | #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ |
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165 | #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */ |
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166 | @@ -56,11 +60,17 @@ |
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167 | #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ |
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168 | |||
169 | /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ |
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170 | -#define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */ |
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171 | -#define SPINOR_OP_READ4_FAST 0x0c /* Read data bytes (high frequency) */ |
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172 | -#define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */ |
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173 | -#define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */ |
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174 | +#define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */ |
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175 | +#define SPINOR_OP_READ_FAST_4B 0x0c /* Read data bytes (high frequency) */ |
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176 | +#define SPINOR_OP_READ_1_1_2_4B 0x3c /* Read data bytes (Dual Output SPI) */ |
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177 | +#define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */ |
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178 | +#define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */ |
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179 | +#define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */ |
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180 | #define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */ |
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181 | +#define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */ |
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182 | +#define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */ |
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183 | +#define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */ |
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184 | +#define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */ |
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185 | #define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */ |
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186 | |||
187 | /* Used for SST flashes only. */ |