OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001 |
2 | From: Jonas Gorski <jogo@openwrt.org> |
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3 | Date: Sun, 15 Dec 2013 20:46:26 +0100 |
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4 | Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs |
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5 | |||
6 | Newer SoCs have 128 bit wide irq registers, thus 128 available internal |
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7 | interupts. |
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8 | --- |
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9 | arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++- |
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10 | arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +- |
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11 | 2 files changed, 4 insertions(+), 2 deletions(-) |
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12 | |||
13 | --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h |
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14 | +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h |
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15 | @@ -1,10 +1,12 @@ |
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16 | #ifndef BCM63XX_IRQ_H_ |
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17 | #define BCM63XX_IRQ_H_ |
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18 | |||
19 | +#include <irq.h> |
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20 | #include <bcm63xx_cpu.h> |
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21 | |||
22 | #define IRQ_INTERNAL_BASE 8 |
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23 | -#define IRQ_EXTERNAL_BASE 100 |
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24 | +#define NR_INTERNAL_IRQS 128 |
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25 | +#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS) |
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26 | #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0) |
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27 | #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1) |
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28 | #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2) |
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29 | --- a/arch/mips/include/asm/mach-bcm63xx/irq.h |
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30 | +++ b/arch/mips/include/asm/mach-bcm63xx/irq.h |
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31 | @@ -1,7 +1,7 @@ |
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32 | #ifndef __ASM_MACH_BCM63XX_IRQ_H |
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33 | #define __ASM_MACH_BCM63XX_IRQ_H |
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34 | |||
35 | -#define NR_IRQS 128 |
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36 | +#define NR_IRQS 256 |
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37 | #define MIPS_CPU_IRQ_BASE 0 |
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38 | |||
39 | #endif |