OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001 |
2 | From: Jonas Gorski <jonas.gorski@gmail.com> |
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3 | Date: Wed, 27 Jul 2016 11:36:51 +0200 |
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4 | Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding |
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5 | documentation |
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6 | |||
7 | Add binding documentation for the pincontrol core found in BCM6368 SoCs. |
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8 | |||
9 | Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> |
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10 | --- |
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11 | .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++ |
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12 | 1 file changed, 67 insertions(+) |
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13 | create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt |
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14 | |||
15 | --- /dev/null |
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16 | +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt |
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17 | @@ -0,0 +1,67 @@ |
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18 | +* Broadcom BCM6368 pin controller |
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19 | + |
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20 | +Required properties: |
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21 | +- compatible: Must be "brcm,bcm6368-pinctrl". |
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22 | +- reg: Register specifiers of dirout, dat, mode registers. |
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23 | +- reg-names: Must be "dirout", "dat", "mode". |
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24 | +- brcm,gpiobasemode: Phandle to the gpio basemode register. |
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25 | +- gpio-controller: Identifies this node as a GPIO controller. |
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26 | +- #gpio-cells: Must be <2>. |
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27 | + |
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28 | +Example: |
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29 | + |
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30 | +pinctrl: pin-controller@10000080 { |
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31 | + compatible = "brcm,bcm6368-pinctrl"; |
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32 | + reg = <0x10000080 0x08>, |
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33 | + <0x10000088 0x08>, |
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34 | + <0x10000098 0x04>; |
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35 | + reg-names = "dirout", "dat", "mode"; |
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36 | + brcm,gpiobasemode = <&gpiobasemode>; |
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37 | + |
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38 | + gpio-controller; |
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39 | + #gpio-cells = <2>; |
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40 | +}; |
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41 | + |
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42 | +gpiobasemode: syscon@100000b8 { |
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43 | + compatible = "brcm,bcm6368-gpiobasemode", "syscon"; |
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44 | + reg = <0x100000b8 4>; |
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45 | + native-endian; |
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46 | +}; |
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47 | + |
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48 | +Available pins/groups and functions: |
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49 | + |
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50 | +name pins functions |
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51 | +----------------------------------------------------------- |
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52 | +gpio0 0 analog_afe0 |
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53 | +gpio1 1 analog_afe1 |
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54 | +gpio2 2 sys_irq |
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55 | +gpio3 3 serial_led_data |
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56 | +gpio4 4 serial_led_clk |
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57 | +gpio5 5 inet_led |
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58 | +gpio6 6 ephy0_led |
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59 | +gpio7 7 ephy1_led |
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60 | +gpio8 8 ephy2_led |
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61 | +gpio9 9 ephy3_led |
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62 | +gpio10 10 robosw_led_data |
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63 | +gpio11 11 robosw_led_clk |
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64 | +gpio12 12 robosw_led0 |
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65 | +gpio13 13 robosw_led1 |
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66 | +gpio14 14 usb_device_led |
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67 | +gpio15 15 - |
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68 | +gpio16 16 pci_req1 |
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69 | +gpio17 17 pci_gnt1 |
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70 | +gpio18 18 pci_intb |
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71 | +gpio19 19 pci_req0 |
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72 | +gpio20 20 pci_gnt0 |
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73 | +gpio21 21 - |
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74 | +gpio22 22 pcmcia_cd1 |
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75 | +gpio23 23 pcmcia_cd2 |
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76 | +gpio24 24 pcmcia_vs1 |
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77 | +gpio25 25 pcmcia_vs2 |
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78 | +gpio26 26 ebi_cs2 |
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79 | +gpio27 27 ebi_cs3 |
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80 | +gpio28 28 spi_cs2 |
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81 | +gpio29 29 spi_cs3 |
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82 | +gpio30 30 spi_cs4 |
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83 | +gpio31 31 spi_cs5 |
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84 | +uart1_grp 30-33 uart1 |