OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 45444cb631555e2dc16b95d779b10aa075c7482e Mon Sep 17 00:00:00 2001 |
2 | From: Jonas Gorski <jonas.gorski@gmail.com> |
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3 | Date: Fri, 24 Jun 2016 22:14:13 +0200 |
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4 | Subject: [PATCH 05/16] pinctrl: add a pincontrol driver for BCM6348 |
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5 | |||
6 | Add a pincotrol driver for BCM6348. BCM6348 allow muxing five groups of |
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7 | up to ten gpios into fourteen potential functions. It does not allow |
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8 | muxing individual pins. Some functions require more than one group to be |
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9 | muxed to the same function. |
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10 | |||
11 | Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> |
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12 | --- |
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13 | drivers/pinctrl/bcm63xx/Kconfig | 7 + |
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14 | drivers/pinctrl/bcm63xx/Makefile | 1 + |
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3 | office | 15 | drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c | 392 ++++++++++++++++++++++++++++++ |
16 | 3 files changed, 400 insertions(+) |
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1 | office | 17 | create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c |
18 | |||
19 | --- a/drivers/pinctrl/bcm63xx/Kconfig |
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20 | +++ b/drivers/pinctrl/bcm63xx/Kconfig |
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21 | @@ -8,3 +8,10 @@ config PINCTRL_BCM6328 |
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22 | select PINCONF |
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23 | select PINCTRL_BCM63XX |
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24 | select GENERIC_PINCONF |
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25 | + |
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26 | +config PINCTRL_BCM6348 |
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27 | + bool "BCM6348 pincontrol driver" if COMPILE_TEST |
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28 | + select PINMUX |
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29 | + select PINCONF |
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30 | + select PINCTRL_BCM63XX |
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31 | + select GENERIC_PINCONF |
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32 | --- a/drivers/pinctrl/bcm63xx/Makefile |
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33 | +++ b/drivers/pinctrl/bcm63xx/Makefile |
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34 | @@ -1,2 +1,3 @@ |
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35 | obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o |
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36 | obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o |
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37 | +obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o |
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38 | --- /dev/null |
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39 | +++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c |
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3 | office | 40 | @@ -0,0 +1,392 @@ |
1 | office | 41 | +/* |
42 | + * This file is subject to the terms and conditions of the GNU General Public |
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43 | + * License. See the file "COPYING" in the main directory of this archive |
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44 | + * for more details. |
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45 | + * |
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46 | + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com> |
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47 | + */ |
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48 | + |
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49 | +#include <linux/kernel.h> |
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50 | +#include <linux/spinlock.h> |
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51 | +#include <linux/bitops.h> |
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52 | +#include <linux/gpio.h> |
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53 | +#include <linux/of.h> |
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54 | +#include <linux/of_gpio.h> |
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55 | +#include <linux/slab.h> |
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56 | +#include <linux/platform_device.h> |
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57 | + |
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58 | +#include <linux/pinctrl/machine.h> |
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59 | +#include <linux/pinctrl/pinconf.h> |
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60 | +#include <linux/pinctrl/pinconf-generic.h> |
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61 | +#include <linux/pinctrl/pinmux.h> |
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62 | + |
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63 | +#include "../core.h" |
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64 | +#include "../pinctrl-utils.h" |
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65 | + |
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66 | +#include "pinctrl-bcm63xx.h" |
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67 | + |
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68 | +#define BCM6348_NGPIO 37 |
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69 | + |
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70 | +#define MAX_GROUP 4 |
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71 | +#define PINS_PER_GROUP 8 |
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72 | +#define PIN_TO_GROUP(pin) (MAX_GROUP - ((pin) / PINS_PER_GROUP)) |
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73 | +#define GROUP_SHIFT(pin) (PIN_TO_GROUP(pin) * 4) |
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74 | +#define GROUP_MASK(pin) (0xf << GROUP_SHIFT(pin)) |
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75 | + |
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76 | +struct bcm6348_pingroup { |
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77 | + const char *name; |
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78 | + const unsigned * const pins; |
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79 | + const unsigned num_pins; |
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80 | +}; |
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81 | + |
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82 | +struct bcm6348_function { |
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83 | + const char *name; |
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84 | + const char * const *groups; |
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85 | + const unsigned num_groups; |
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86 | + unsigned int value; |
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87 | +}; |
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88 | + |
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89 | +struct bcm6348_pinctrl { |
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90 | + struct pinctrl_dev *pctldev; |
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91 | + struct pinctrl_desc desc; |
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92 | + |
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93 | + void __iomem *mode; |
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94 | + |
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95 | + /* register access lock */ |
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96 | + spinlock_t lock; |
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97 | + |
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98 | + struct gpio_chip gpio[2]; |
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99 | +}; |
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100 | + |
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101 | +#define BCM6348_PIN(a, b, group) \ |
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102 | + { \ |
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103 | + .number = a, \ |
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104 | + .name = b, \ |
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105 | + .drv_data = (void *)(group), \ |
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106 | + } |
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107 | + |
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108 | +static const struct pinctrl_pin_desc bcm6348_pins[] = { |
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109 | + BCM6348_PIN(0, "gpio0", 4), |
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110 | + BCM6348_PIN(1, "gpio1", 4), |
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111 | + BCM6348_PIN(2, "gpio2", 4), |
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112 | + BCM6348_PIN(3, "gpio3", 4), |
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113 | + BCM6348_PIN(4, "gpio4", 4), |
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114 | + BCM6348_PIN(5, "gpio5", 4), |
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115 | + BCM6348_PIN(6, "gpio6", 4), |
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116 | + BCM6348_PIN(7, "gpio7", 4), |
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117 | + BCM6348_PIN(8, "gpio8", 3), |
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118 | + BCM6348_PIN(9, "gpio9", 3), |
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119 | + BCM6348_PIN(10, "gpio10", 3), |
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120 | + BCM6348_PIN(11, "gpio11", 3), |
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121 | + BCM6348_PIN(12, "gpio12", 3), |
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122 | + BCM6348_PIN(13, "gpio13", 3), |
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123 | + BCM6348_PIN(14, "gpio14", 3), |
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124 | + BCM6348_PIN(15, "gpio15", 3), |
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125 | + BCM6348_PIN(16, "gpio16", 2), |
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126 | + BCM6348_PIN(17, "gpio17", 2), |
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127 | + BCM6348_PIN(18, "gpio18", 2), |
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128 | + BCM6348_PIN(19, "gpio19", 2), |
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129 | + BCM6348_PIN(20, "gpio20", 2), |
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130 | + BCM6348_PIN(21, "gpio21", 2), |
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131 | + BCM6348_PIN(22, "gpio22", 1), |
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132 | + BCM6348_PIN(23, "gpio23", 1), |
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133 | + BCM6348_PIN(24, "gpio24", 1), |
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134 | + BCM6348_PIN(25, "gpio25", 1), |
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135 | + BCM6348_PIN(26, "gpio26", 1), |
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136 | + BCM6348_PIN(27, "gpio27", 1), |
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137 | + BCM6348_PIN(28, "gpio28", 1), |
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138 | + BCM6348_PIN(29, "gpio29", 1), |
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139 | + BCM6348_PIN(30, "gpio30", 1), |
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140 | + BCM6348_PIN(31, "gpio31", 1), |
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141 | + BCM6348_PIN(32, "gpio32", 0), |
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142 | + BCM6348_PIN(33, "gpio33", 0), |
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143 | + BCM6348_PIN(34, "gpio34", 0), |
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144 | + BCM6348_PIN(35, "gpio35", 0), |
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145 | + BCM6348_PIN(36, "gpio36", 0), |
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146 | +}; |
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147 | + |
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148 | +enum bcm6348_muxes { |
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149 | + BCM6348_MUX_GPIO = 0, |
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150 | + BCM6348_MUX_EXT_EPHY, |
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151 | + BCM6348_MUX_MII_SNOOP, |
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152 | + BCM6348_MUX_LEGACY_LED, |
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153 | + BCM6348_MUX_MII_PCCARD, |
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154 | + BCM6348_MUX_PCI, |
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155 | + BCM6348_MUX_SPI_MASTER_UART, |
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156 | + BCM6348_MUX_EXT_MII, |
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157 | + BCM6348_MUX_UTOPIA, |
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158 | + BCM6348_MUX_DIAG, |
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159 | +}; |
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160 | + |
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161 | +static unsigned group0_pins[] = { |
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162 | + 32, 33, 34, 35, 36, |
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163 | +}; |
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164 | + |
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165 | +static unsigned group1_pins[] = { |
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166 | + 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, |
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167 | +}; |
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168 | + |
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169 | +static unsigned group2_pins[] = { |
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170 | + 16, 17, 18, 19, 20, 21, |
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171 | +}; |
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172 | + |
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173 | +static unsigned group3_pins[] = { |
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174 | + 8, 9, 10, 11, 12, 13, 14, 15, |
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175 | +}; |
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176 | + |
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177 | +static unsigned group4_pins[] = { |
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178 | + 0, 1, 2, 3, 4, 5, 6, 7, |
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179 | +}; |
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180 | + |
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181 | +#define BCM6348_GROUP(n) \ |
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182 | + { \ |
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183 | + .name = #n, \ |
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184 | + .pins = n##_pins, \ |
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185 | + .num_pins = ARRAY_SIZE(n##_pins), \ |
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186 | + } \ |
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187 | + |
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188 | +static struct bcm6348_pingroup bcm6348_groups[] = { |
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189 | + BCM6348_GROUP(group0), |
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190 | + BCM6348_GROUP(group1), |
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191 | + BCM6348_GROUP(group2), |
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192 | + BCM6348_GROUP(group3), |
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193 | + BCM6348_GROUP(group4), |
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194 | +}; |
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195 | + |
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196 | +static const char * const ext_mii_groups[] = { |
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197 | + "group0", |
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198 | + "group3", |
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199 | +}; |
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200 | + |
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201 | +static const char * const ext_ephy_groups[] = { |
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202 | + "group1", |
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203 | + "group4" |
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204 | +}; |
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205 | + |
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206 | +static const char * const mii_snoop_groups[] = { |
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207 | + "group1", |
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208 | + "group4", |
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209 | +}; |
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210 | + |
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211 | +static const char * const legacy_led_groups[] = { |
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212 | + "group4", |
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213 | +}; |
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214 | + |
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215 | +static const char * const mii_pccard_groups[] = { |
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216 | + "group1", |
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217 | +}; |
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218 | + |
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219 | +static const char * const pci_groups[] = { |
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220 | + "group2", |
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221 | +}; |
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222 | + |
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223 | +static const char * const spi_master_uart_groups[] = { |
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224 | + "group1", |
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225 | +}; |
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226 | + |
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227 | +static const char * const utopia_groups[] = { |
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228 | + "group0", |
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229 | + "group1", |
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230 | + "group3", |
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231 | +}; |
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232 | + |
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233 | +static const char * const diag_groups[] = { |
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234 | + "group0", |
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235 | + "group1", |
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236 | + "group2", |
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237 | + "group4", |
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238 | +}; |
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239 | + |
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240 | +#define BCM6348_FUN(n, f) \ |
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241 | + { \ |
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242 | + .name = #n, \ |
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243 | + .groups = n##_groups, \ |
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244 | + .num_groups = ARRAY_SIZE(n##_groups), \ |
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245 | + .value = BCM6348_MUX_##f, \ |
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246 | + } |
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247 | + |
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248 | +static const struct bcm6348_function bcm6348_funcs[] = { |
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249 | + BCM6348_FUN(ext_mii, EXT_MII), |
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250 | + BCM6348_FUN(ext_ephy, EXT_EPHY), |
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251 | + BCM6348_FUN(mii_snoop, MII_SNOOP), |
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252 | + BCM6348_FUN(legacy_led, LEGACY_LED), |
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253 | + BCM6348_FUN(mii_pccard, MII_PCCARD), |
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254 | + BCM6348_FUN(pci, PCI), |
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255 | + BCM6348_FUN(spi_master_uart, SPI_MASTER_UART), |
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256 | + BCM6348_FUN(utopia, UTOPIA), |
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257 | + BCM6348_FUN(diag, DIAG), |
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258 | +}; |
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259 | + |
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260 | +static int bcm6348_pinctrl_get_group_count(struct pinctrl_dev *pctldev) |
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261 | +{ |
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262 | + return ARRAY_SIZE(bcm6348_groups); |
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263 | +} |
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264 | + |
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265 | +static const char *bcm6348_pinctrl_get_group_name(struct pinctrl_dev *pctldev, |
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266 | + unsigned group) |
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267 | +{ |
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268 | + return bcm6348_groups[group].name; |
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269 | +} |
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270 | + |
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271 | +static int bcm6348_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, |
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272 | + unsigned group, const unsigned **pins, |
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273 | + unsigned *num_pins) |
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274 | +{ |
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275 | + *pins = bcm6348_groups[group].pins; |
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276 | + *num_pins = bcm6348_groups[group].num_pins; |
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277 | + |
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278 | + return 0; |
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279 | +} |
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280 | + |
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281 | +static int bcm6348_pinctrl_get_func_count(struct pinctrl_dev *pctldev) |
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282 | +{ |
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283 | + return ARRAY_SIZE(bcm6348_funcs); |
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284 | +} |
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285 | + |
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286 | +static const char *bcm6348_pinctrl_get_func_name(struct pinctrl_dev *pctldev, |
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287 | + unsigned selector) |
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288 | +{ |
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289 | + return bcm6348_funcs[selector].name; |
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290 | +} |
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291 | + |
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292 | +static int bcm6348_pinctrl_get_groups(struct pinctrl_dev *pctldev, |
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293 | + unsigned selector, |
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294 | + const char * const **groups, |
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295 | + unsigned * const num_groups) |
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296 | +{ |
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297 | + *groups = bcm6348_funcs[selector].groups; |
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298 | + *num_groups = bcm6348_funcs[selector].num_groups; |
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299 | + |
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300 | + return 0; |
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301 | +} |
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302 | + |
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303 | +static void bcm6348_rmw_mux(struct bcm6348_pinctrl *pctl, u32 mask, u32 val) |
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304 | +{ |
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305 | + unsigned long flags; |
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306 | + u32 reg; |
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307 | + |
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308 | + spin_lock_irqsave(&pctl->lock, flags); |
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309 | + |
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310 | + reg = __raw_readl(pctl->mode); |
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311 | + reg &= ~mask; |
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312 | + reg |= val & mask; |
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313 | + __raw_writel(reg, pctl->mode); |
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314 | + |
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315 | + spin_unlock_irqrestore(&pctl->lock, flags); |
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316 | +} |
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317 | + |
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318 | +static int bcm6348_pinctrl_set_mux(struct pinctrl_dev *pctldev, |
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319 | + unsigned selector, unsigned group) |
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320 | +{ |
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321 | + struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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322 | + const struct bcm6348_pingroup *grp = &bcm6348_groups[group]; |
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323 | + const struct bcm6348_function *f = &bcm6348_funcs[selector]; |
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3 | office | 324 | + u32 group_num, mask, val; |
1 | office | 325 | + |
326 | + /* |
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327 | + * pins n..(n+7) share the same group, so we only need to look at |
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328 | + * the first pin. |
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329 | + */ |
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3 | office | 330 | + group_num = (unsigned long)bcm6348_pins[grp->pins[0]].drv_data; |
331 | + mask = GROUP_MASK(group_num); |
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332 | + val = f->value << GROUP_SHIFT(group_num); |
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1 | office | 333 | + |
334 | + bcm6348_rmw_mux(pctl, mask, val); |
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335 | + |
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336 | + return 0; |
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337 | +} |
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338 | + |
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339 | +static int bcm6348_gpio_request_enable(struct pinctrl_dev *pctldev, |
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340 | + struct pinctrl_gpio_range *range, |
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341 | + unsigned offset) |
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342 | +{ |
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343 | + struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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344 | + struct pin_desc *desc; |
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345 | + u32 mask; |
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346 | + |
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347 | + /* don't reconfigure if already muxed */ |
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348 | + desc = pin_desc_get(pctldev, offset); |
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349 | + if (desc->mux_usecount) |
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350 | + return 0; |
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351 | + |
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352 | + mask = GROUP_MASK(offset); |
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353 | + |
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354 | + /* disable all functions using this pin */ |
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355 | + bcm6348_rmw_mux(pctl, mask, 0); |
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356 | + |
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357 | + return 0; |
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358 | +} |
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359 | + |
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360 | +static struct pinctrl_ops bcm6348_pctl_ops = { |
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361 | + .get_groups_count = bcm6348_pinctrl_get_group_count, |
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362 | + .get_group_name = bcm6348_pinctrl_get_group_name, |
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363 | + .get_group_pins = bcm6348_pinctrl_get_group_pins, |
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364 | +#ifdef CONFIG_OF |
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365 | + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, |
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366 | + .dt_free_map = pinctrl_utils_free_map, |
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367 | +#endif |
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368 | +}; |
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369 | + |
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370 | +static struct pinmux_ops bcm6348_pmx_ops = { |
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371 | + .get_functions_count = bcm6348_pinctrl_get_func_count, |
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372 | + .get_function_name = bcm6348_pinctrl_get_func_name, |
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373 | + .get_function_groups = bcm6348_pinctrl_get_groups, |
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374 | + .set_mux = bcm6348_pinctrl_set_mux, |
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375 | + .gpio_request_enable = bcm6348_gpio_request_enable, |
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376 | + .strict = true, |
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377 | +}; |
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378 | + |
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379 | +static int bcm6348_pinctrl_probe(struct platform_device *pdev) |
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380 | +{ |
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381 | + struct bcm6348_pinctrl *pctl; |
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382 | + struct resource *res; |
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383 | + void __iomem *mode; |
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384 | + |
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385 | + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); |
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386 | + mode = devm_ioremap_resource(&pdev->dev, res); |
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387 | + if (IS_ERR(mode)) |
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388 | + return PTR_ERR(mode); |
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389 | + |
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390 | + pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); |
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391 | + if (!pctl) |
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392 | + return -ENOMEM; |
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393 | + |
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394 | + spin_lock_init(&pctl->lock); |
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395 | + |
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396 | + pctl->mode = mode; |
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397 | + |
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398 | + /* disable all muxes by default */ |
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399 | + __raw_writel(0, pctl->mode); |
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400 | + |
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401 | + pctl->desc.name = dev_name(&pdev->dev); |
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402 | + pctl->desc.owner = THIS_MODULE; |
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403 | + pctl->desc.pctlops = &bcm6348_pctl_ops; |
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404 | + pctl->desc.pmxops = &bcm6348_pmx_ops; |
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405 | + |
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406 | + pctl->desc.npins = ARRAY_SIZE(bcm6348_pins); |
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407 | + pctl->desc.pins = bcm6348_pins; |
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408 | + |
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409 | + platform_set_drvdata(pdev, pctl); |
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410 | + |
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411 | + pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, |
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412 | + pctl->gpio, BCM6348_NGPIO); |
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413 | + if (IS_ERR(pctl->pctldev)) |
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414 | + return PTR_ERR(pctl->pctldev); |
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415 | + |
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416 | + return 0; |
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417 | +} |
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418 | + |
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419 | +static const struct of_device_id bcm6348_pinctrl_match[] = { |
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420 | + { .compatible = "brcm,bcm6348-pinctrl", }, |
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421 | + { }, |
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422 | +}; |
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423 | + |
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424 | +static struct platform_driver bcm6348_pinctrl_driver = { |
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425 | + .probe = bcm6348_pinctrl_probe, |
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426 | + .driver = { |
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427 | + .name = "bcm6348-pinctrl", |
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428 | + .of_match_table = bcm6348_pinctrl_match, |
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429 | + }, |
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430 | +}; |
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431 | + |
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432 | +builtin_platform_driver(bcm6348_pinctrl_driver); |