OpenWrt – Blame information for rev 2

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1 office 1 From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Fri, 24 Jun 2016 22:12:50 +0200
4 Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328
5  
6 Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as
7 GPIOs, as LEDs for the integrated LED controller, or various other
8 functions. Its pincontrol mux registers also control other aspects, like
9 switching the second USB port between host and device mode.
10  
11 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
12 ---
13 drivers/pinctrl/bcm63xx/Kconfig | 7 +
14 drivers/pinctrl/bcm63xx/Makefile | 1 +
15 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++
16 3 files changed, 464 insertions(+)
17 create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
18  
19 --- a/drivers/pinctrl/bcm63xx/Kconfig
20 +++ b/drivers/pinctrl/bcm63xx/Kconfig
21 @@ -1,3 +1,10 @@
22 config PINCTRL_BCM63XX
23 bool
24 select GPIO_GENERIC
25 +
26 +config PINCTRL_BCM6328
27 + bool "BCM6328 pincontrol driver" if COMPILE_TEST
28 + select PINMUX
29 + select PINCONF
30 + select PINCTRL_BCM63XX
31 + select GENERIC_PINCONF
32 --- a/drivers/pinctrl/bcm63xx/Makefile
33 +++ b/drivers/pinctrl/bcm63xx/Makefile
34 @@ -1 +1,2 @@
35 obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
36 +obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
37 --- /dev/null
38 +++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
39 @@ -0,0 +1,456 @@
40 +/*
41 + * This file is subject to the terms and conditions of the GNU General Public
42 + * License. See the file "COPYING" in the main directory of this archive
43 + * for more details.
44 + *
45 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
46 + */
47 +
48 +#include <linux/bitops.h>
49 +#include <linux/gpio.h>
50 +#include <linux/kernel.h>
51 +#include <linux/slab.h>
52 +#include <linux/spinlock.h>
53 +#include <linux/of.h>
54 +#include <linux/of_gpio.h>
55 +#include <linux/platform_device.h>
56 +
57 +#include <linux/pinctrl/machine.h>
58 +#include <linux/pinctrl/pinconf.h>
59 +#include <linux/pinctrl/pinconf-generic.h>
60 +#include <linux/pinctrl/pinmux.h>
61 +
62 +#include "../core.h"
63 +#include "../pinctrl-utils.h"
64 +
65 +#include "pinctrl-bcm63xx.h"
66 +
67 +#define BCM6328_MUX_LO_REG 0x4
68 +#define BCM6328_MUX_HI_REG 0x0
69 +#define BCM6328_MUX_OTHER_REG 0x8
70 +
71 +#define BCM6328_NGPIO 32
72 +
73 +struct bcm6328_pingroup {
74 + const char *name;
75 + const unsigned * const pins;
76 + const unsigned num_pins;
77 +};
78 +
79 +struct bcm6328_function {
80 + const char *name;
81 + const char * const *groups;
82 + const unsigned num_groups;
83 +
84 + unsigned mode_val:1;
85 + unsigned mux_val:2;
86 +};
87 +
88 +struct bcm6328_pinctrl {
89 + struct pinctrl_dev *pctldev;
90 + struct pinctrl_desc desc;
91 +
92 + void __iomem *mode;
93 + void __iomem *mux[3];
94 +
95 + /* register access lock */
96 + spinlock_t lock;
97 +
98 + struct gpio_chip gpio;
99 +};
100 +
101 +static const struct pinctrl_pin_desc bcm6328_pins[] = {
102 + PINCTRL_PIN(0, "gpio0"),
103 + PINCTRL_PIN(1, "gpio1"),
104 + PINCTRL_PIN(2, "gpio2"),
105 + PINCTRL_PIN(3, "gpio3"),
106 + PINCTRL_PIN(4, "gpio4"),
107 + PINCTRL_PIN(5, "gpio5"),
108 + PINCTRL_PIN(6, "gpio6"),
109 + PINCTRL_PIN(7, "gpio7"),
110 + PINCTRL_PIN(8, "gpio8"),
111 + PINCTRL_PIN(9, "gpio9"),
112 + PINCTRL_PIN(10, "gpio10"),
113 + PINCTRL_PIN(11, "gpio11"),
114 + PINCTRL_PIN(12, "gpio12"),
115 + PINCTRL_PIN(13, "gpio13"),
116 + PINCTRL_PIN(14, "gpio14"),
117 + PINCTRL_PIN(15, "gpio15"),
118 + PINCTRL_PIN(16, "gpio16"),
119 + PINCTRL_PIN(17, "gpio17"),
120 + PINCTRL_PIN(18, "gpio18"),
121 + PINCTRL_PIN(19, "gpio19"),
122 + PINCTRL_PIN(20, "gpio20"),
123 + PINCTRL_PIN(21, "gpio21"),
124 + PINCTRL_PIN(22, "gpio22"),
125 + PINCTRL_PIN(23, "gpio23"),
126 + PINCTRL_PIN(24, "gpio24"),
127 + PINCTRL_PIN(25, "gpio25"),
128 + PINCTRL_PIN(26, "gpio26"),
129 + PINCTRL_PIN(27, "gpio27"),
130 + PINCTRL_PIN(28, "gpio28"),
131 + PINCTRL_PIN(29, "gpio29"),
132 + PINCTRL_PIN(30, "gpio30"),
133 + PINCTRL_PIN(31, "gpio31"),
134 +
135 + /*
136 + * No idea where they really are; so let's put them according
137 + * to their mux offsets.
138 + */
139 + PINCTRL_PIN(36, "hsspi_cs1"),
140 + PINCTRL_PIN(38, "usb_p2"),
141 +};
142 +
143 +static unsigned gpio0_pins[] = { 0 };
144 +static unsigned gpio1_pins[] = { 1 };
145 +static unsigned gpio2_pins[] = { 2 };
146 +static unsigned gpio3_pins[] = { 3 };
147 +static unsigned gpio4_pins[] = { 4 };
148 +static unsigned gpio5_pins[] = { 5 };
149 +static unsigned gpio6_pins[] = { 6 };
150 +static unsigned gpio7_pins[] = { 7 };
151 +static unsigned gpio8_pins[] = { 8 };
152 +static unsigned gpio9_pins[] = { 9 };
153 +static unsigned gpio10_pins[] = { 10 };
154 +static unsigned gpio11_pins[] = { 11 };
155 +static unsigned gpio12_pins[] = { 12 };
156 +static unsigned gpio13_pins[] = { 13 };
157 +static unsigned gpio14_pins[] = { 14 };
158 +static unsigned gpio15_pins[] = { 15 };
159 +static unsigned gpio16_pins[] = { 16 };
160 +static unsigned gpio17_pins[] = { 17 };
161 +static unsigned gpio18_pins[] = { 18 };
162 +static unsigned gpio19_pins[] = { 19 };
163 +static unsigned gpio20_pins[] = { 20 };
164 +static unsigned gpio21_pins[] = { 21 };
165 +static unsigned gpio22_pins[] = { 22 };
166 +static unsigned gpio23_pins[] = { 23 };
167 +static unsigned gpio24_pins[] = { 24 };
168 +static unsigned gpio25_pins[] = { 25 };
169 +static unsigned gpio26_pins[] = { 26 };
170 +static unsigned gpio27_pins[] = { 27 };
171 +static unsigned gpio28_pins[] = { 28 };
172 +static unsigned gpio29_pins[] = { 29 };
173 +static unsigned gpio30_pins[] = { 30 };
174 +static unsigned gpio31_pins[] = { 31 };
175 +
176 +static unsigned hsspi_cs1_pins[] = { 36 };
177 +static unsigned usb_port1_pins[] = { 38 };
178 +
179 +#define BCM6328_GROUP(n) \
180 + { \
181 + .name = #n, \
182 + .pins = n##_pins, \
183 + .num_pins = ARRAY_SIZE(n##_pins), \
184 + }
185 +
186 +static struct bcm6328_pingroup bcm6328_groups[] = {
187 + BCM6328_GROUP(gpio0),
188 + BCM6328_GROUP(gpio1),
189 + BCM6328_GROUP(gpio2),
190 + BCM6328_GROUP(gpio3),
191 + BCM6328_GROUP(gpio4),
192 + BCM6328_GROUP(gpio5),
193 + BCM6328_GROUP(gpio6),
194 + BCM6328_GROUP(gpio7),
195 + BCM6328_GROUP(gpio8),
196 + BCM6328_GROUP(gpio9),
197 + BCM6328_GROUP(gpio10),
198 + BCM6328_GROUP(gpio11),
199 + BCM6328_GROUP(gpio12),
200 + BCM6328_GROUP(gpio13),
201 + BCM6328_GROUP(gpio14),
202 + BCM6328_GROUP(gpio15),
203 + BCM6328_GROUP(gpio16),
204 + BCM6328_GROUP(gpio17),
205 + BCM6328_GROUP(gpio18),
206 + BCM6328_GROUP(gpio19),
207 + BCM6328_GROUP(gpio20),
208 + BCM6328_GROUP(gpio21),
209 + BCM6328_GROUP(gpio22),
210 + BCM6328_GROUP(gpio23),
211 + BCM6328_GROUP(gpio24),
212 + BCM6328_GROUP(gpio25),
213 + BCM6328_GROUP(gpio26),
214 + BCM6328_GROUP(gpio27),
215 + BCM6328_GROUP(gpio28),
216 + BCM6328_GROUP(gpio29),
217 + BCM6328_GROUP(gpio30),
218 + BCM6328_GROUP(gpio31),
219 +
220 + BCM6328_GROUP(hsspi_cs1),
221 + BCM6328_GROUP(usb_port1),
222 +};
223 +
224 +/* GPIO_MODE */
225 +static const char * const led_groups[] = {
226 + "gpio0",
227 + "gpio1",
228 + "gpio2",
229 + "gpio3",
230 + "gpio4",
231 + "gpio5",
232 + "gpio6",
233 + "gpio7",
234 + "gpio8",
235 + "gpio9",
236 + "gpio10",
237 + "gpio11",
238 + "gpio12",
239 + "gpio13",
240 + "gpio14",
241 + "gpio15",
242 + "gpio16",
243 + "gpio17",
244 + "gpio18",
245 + "gpio19",
246 + "gpio20",
247 + "gpio21",
248 + "gpio22",
249 + "gpio23",
250 +};
251 +
252 +/* PINMUX_SEL */
253 +static const char * const serial_led_data_groups[] = {
254 + "gpio6",
255 +};
256 +
257 +static const char * const serial_led_clk_groups[] = {
258 + "gpio7",
259 +};
260 +
261 +static const char * const inet_act_led_groups[] = {
262 + "gpio11",
263 +};
264 +
265 +static const char * const pcie_clkreq_groups[] = {
266 + "gpio16",
267 +};
268 +
269 +static const char * const ephy0_act_led_groups[] = {
270 + "gpio25",
271 +};
272 +
273 +static const char * const ephy1_act_led_groups[] = {
274 + "gpio26",
275 +};
276 +
277 +static const char * const ephy2_act_led_groups[] = {
278 + "gpio27",
279 +};
280 +
281 +static const char * const ephy3_act_led_groups[] = {
282 + "gpio28",
283 +};
284 +
285 +static const char * const hsspi_cs1_groups[] = {
286 + "hsspi_cs1"
287 +};
288 +
289 +static const char * const usb_host_port_groups[] = {
290 + "usb_port1",
291 +};
292 +
293 +static const char * const usb_device_port_groups[] = {
294 + "usb_port1",
295 +};
296 +
297 +#define BCM6328_MODE_FUN(n) \
298 + { \
299 + .name = #n, \
300 + .groups = n##_groups, \
301 + .num_groups = ARRAY_SIZE(n##_groups), \
302 + .mode_val = 1, \
303 + }
304 +
305 +#define BCM6328_MUX_FUN(n, mux) \
306 + { \
307 + .name = #n, \
308 + .groups = n##_groups, \
309 + .num_groups = ARRAY_SIZE(n##_groups), \
310 + .mux_val = mux, \
311 + }
312 +
313 +static const struct bcm6328_function bcm6328_funcs[] = {
314 + BCM6328_MODE_FUN(led),
315 + BCM6328_MUX_FUN(serial_led_data, 2),
316 + BCM6328_MUX_FUN(serial_led_clk, 2),
317 + BCM6328_MUX_FUN(inet_act_led, 1),
318 + BCM6328_MUX_FUN(pcie_clkreq, 2),
319 + BCM6328_MUX_FUN(ephy0_act_led, 1),
320 + BCM6328_MUX_FUN(ephy1_act_led, 1),
321 + BCM6328_MUX_FUN(ephy2_act_led, 1),
322 + BCM6328_MUX_FUN(ephy3_act_led, 1),
323 + BCM6328_MUX_FUN(hsspi_cs1, 2),
324 + BCM6328_MUX_FUN(usb_host_port, 1),
325 + BCM6328_MUX_FUN(usb_device_port, 2),
326 +};
327 +
328 +static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
329 +{
330 + return ARRAY_SIZE(bcm6328_groups);
331 +}
332 +
333 +static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
334 + unsigned group)
335 +{
336 + return bcm6328_groups[group].name;
337 +}
338 +
339 +static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
340 + unsigned group, const unsigned **pins,
341 + unsigned *num_pins)
342 +{
343 + *pins = bcm6328_groups[group].pins;
344 + *num_pins = bcm6328_groups[group].num_pins;
345 +
346 + return 0;
347 +}
348 +
349 +static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
350 +{
351 + return ARRAY_SIZE(bcm6328_funcs);
352 +}
353 +
354 +static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
355 + unsigned selector)
356 +{
357 + return bcm6328_funcs[selector].name;
358 +}
359 +
360 +static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev,
361 + unsigned selector,
362 + const char * const **groups,
363 + unsigned * const num_groups)
364 +{
365 + *groups = bcm6328_funcs[selector].groups;
366 + *num_groups = bcm6328_funcs[selector].num_groups;
367 +
368 + return 0;
369 +}
370 +
371 +static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin,
372 + u32 mode, u32 mux)
373 +{
374 + unsigned long flags;
375 + u32 reg;
376 +
377 + spin_lock_irqsave(&pctl->lock, flags);
378 + if (pin < 32) {
379 + reg = __raw_readl(pctl->mode);
380 + reg &= ~BIT(pin);
381 + if (mode)
382 + reg |= BIT(pin);
383 + __raw_writel(reg, pctl->mode);
384 + }
385 +
386 + reg = __raw_readl(pctl->mux[pin / 16]);
387 + reg &= ~(3UL << ((pin % 16) * 2));
388 + reg |= mux << ((pin % 16) * 2);
389 + __raw_writel(reg, pctl->mux[pin / 16]);
390 +
391 + spin_unlock_irqrestore(&pctl->lock, flags);
392 +}
393 +
394 +static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev,
395 + unsigned selector, unsigned group)
396 +{
397 + struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
398 + const struct bcm6328_pingroup *grp = &bcm6328_groups[group];
399 + const struct bcm6328_function *f = &bcm6328_funcs[selector];
400 +
401 + bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
402 +
403 + return 0;
404 +}
405 +
406 +static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev,
407 + struct pinctrl_gpio_range *range,
408 + unsigned offset)
409 +{
410 + struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
411 +
412 + /* disable all functions using this pin */
413 + bcm6328_rmw_mux(pctl, offset, 0, 0);
414 +
415 + return 0;
416 +}
417 +
418 +static struct pinctrl_ops bcm6328_pctl_ops = {
419 + .get_groups_count = bcm6328_pinctrl_get_group_count,
420 + .get_group_name = bcm6328_pinctrl_get_group_name,
421 + .get_group_pins = bcm6328_pinctrl_get_group_pins,
422 +#ifdef CONFIG_OF
423 + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
424 + .dt_free_map = pinctrl_utils_free_map,
425 +#endif
426 +};
427 +
428 +static struct pinmux_ops bcm6328_pmx_ops = {
429 + .get_functions_count = bcm6328_pinctrl_get_func_count,
430 + .get_function_name = bcm6328_pinctrl_get_func_name,
431 + .get_function_groups = bcm6328_pinctrl_get_groups,
432 + .set_mux = bcm6328_pinctrl_set_mux,
433 + .gpio_request_enable = bcm6328_gpio_request_enable,
434 + .strict = true,
435 +};
436 +
437 +static int bcm6328_pinctrl_probe(struct platform_device *pdev)
438 +{
439 + struct bcm6328_pinctrl *pctl;
440 + struct resource *res;
441 + void __iomem *mode, *mux;
442 +
443 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
444 + mode = devm_ioremap_resource(&pdev->dev, res);
445 + if (IS_ERR(mode))
446 + return PTR_ERR(mode);
447 +
448 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
449 + mux = devm_ioremap_resource(&pdev->dev, res);
450 + if (IS_ERR(mux))
451 + return PTR_ERR(mux);
452 +
453 + pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
454 + if (!pctl)
455 + return -ENOMEM;
456 +
457 + spin_lock_init(&pctl->lock);
458 +
459 + pctl->mode = mode;
460 + pctl->mux[0] = mux + BCM6328_MUX_LO_REG;
461 + pctl->mux[1] = mux + BCM6328_MUX_HI_REG;
462 + pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG;
463 +
464 + pctl->desc.name = dev_name(&pdev->dev);
465 + pctl->desc.owner = THIS_MODULE;
466 + pctl->desc.pctlops = &bcm6328_pctl_ops;
467 + pctl->desc.pmxops = &bcm6328_pmx_ops;
468 +
469 + pctl->desc.npins = ARRAY_SIZE(bcm6328_pins);
470 + pctl->desc.pins = bcm6328_pins;
471 +
472 + platform_set_drvdata(pdev, pctl);
473 +
474 + pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
475 + &pctl->gpio, BCM6328_NGPIO);
476 + if (IS_ERR(pctl->pctldev))
477 + return PTR_ERR(pctl->pctldev);
478 +
479 + return 0;
480 +}
481 +
482 +static const struct of_device_id bcm6328_pinctrl_match[] = {
483 + { .compatible = "brcm,bcm6328-pinctrl", },
484 + { },
485 +};
486 +
487 +static struct platform_driver bcm6328_pinctrl_driver = {
488 + .probe = bcm6328_pinctrl_probe,
489 + .driver = {
490 + .name = "bcm6328-pinctrl",
491 + .of_match_table = bcm6328_pinctrl_match,
492 + },
493 +};
494 +
495 +builtin_platform_driver(bcm6328_pinctrl_driver);