OpenWrt – Blame information for rev 2
?pathlinks?
Rev | Author | Line No. | Line |
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1 | office | 1 | From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001 |
2 | From: Jonas Gorski <jonas.gorski@gmail.com> |
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3 | Date: Fri, 24 Jun 2016 22:12:50 +0200 |
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4 | Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328 |
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5 | |||
6 | Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as |
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7 | GPIOs, as LEDs for the integrated LED controller, or various other |
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8 | functions. Its pincontrol mux registers also control other aspects, like |
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9 | switching the second USB port between host and device mode. |
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10 | |||
11 | Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> |
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12 | --- |
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13 | drivers/pinctrl/bcm63xx/Kconfig | 7 + |
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14 | drivers/pinctrl/bcm63xx/Makefile | 1 + |
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15 | drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++ |
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16 | 3 files changed, 464 insertions(+) |
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17 | create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c |
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18 | |||
19 | --- a/drivers/pinctrl/bcm63xx/Kconfig |
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20 | +++ b/drivers/pinctrl/bcm63xx/Kconfig |
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21 | @@ -1,3 +1,10 @@ |
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22 | config PINCTRL_BCM63XX |
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23 | bool |
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24 | select GPIO_GENERIC |
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25 | + |
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26 | +config PINCTRL_BCM6328 |
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27 | + bool "BCM6328 pincontrol driver" if COMPILE_TEST |
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28 | + select PINMUX |
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29 | + select PINCONF |
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30 | + select PINCTRL_BCM63XX |
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31 | + select GENERIC_PINCONF |
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32 | --- a/drivers/pinctrl/bcm63xx/Makefile |
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33 | +++ b/drivers/pinctrl/bcm63xx/Makefile |
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34 | @@ -1 +1,2 @@ |
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35 | obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o |
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36 | +obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o |
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37 | --- /dev/null |
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38 | +++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c |
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39 | @@ -0,0 +1,456 @@ |
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40 | +/* |
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41 | + * This file is subject to the terms and conditions of the GNU General Public |
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42 | + * License. See the file "COPYING" in the main directory of this archive |
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43 | + * for more details. |
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44 | + * |
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45 | + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com> |
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46 | + */ |
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47 | + |
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48 | +#include <linux/bitops.h> |
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49 | +#include <linux/gpio.h> |
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50 | +#include <linux/kernel.h> |
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51 | +#include <linux/slab.h> |
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52 | +#include <linux/spinlock.h> |
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53 | +#include <linux/of.h> |
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54 | +#include <linux/of_gpio.h> |
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55 | +#include <linux/platform_device.h> |
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56 | + |
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57 | +#include <linux/pinctrl/machine.h> |
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58 | +#include <linux/pinctrl/pinconf.h> |
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59 | +#include <linux/pinctrl/pinconf-generic.h> |
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60 | +#include <linux/pinctrl/pinmux.h> |
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61 | + |
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62 | +#include "../core.h" |
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63 | +#include "../pinctrl-utils.h" |
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64 | + |
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65 | +#include "pinctrl-bcm63xx.h" |
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66 | + |
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67 | +#define BCM6328_MUX_LO_REG 0x4 |
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68 | +#define BCM6328_MUX_HI_REG 0x0 |
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69 | +#define BCM6328_MUX_OTHER_REG 0x8 |
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70 | + |
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71 | +#define BCM6328_NGPIO 32 |
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72 | + |
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73 | +struct bcm6328_pingroup { |
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74 | + const char *name; |
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75 | + const unsigned * const pins; |
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76 | + const unsigned num_pins; |
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77 | +}; |
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78 | + |
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79 | +struct bcm6328_function { |
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80 | + const char *name; |
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81 | + const char * const *groups; |
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82 | + const unsigned num_groups; |
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83 | + |
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84 | + unsigned mode_val:1; |
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85 | + unsigned mux_val:2; |
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86 | +}; |
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87 | + |
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88 | +struct bcm6328_pinctrl { |
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89 | + struct pinctrl_dev *pctldev; |
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90 | + struct pinctrl_desc desc; |
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91 | + |
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92 | + void __iomem *mode; |
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93 | + void __iomem *mux[3]; |
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94 | + |
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95 | + /* register access lock */ |
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96 | + spinlock_t lock; |
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97 | + |
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98 | + struct gpio_chip gpio; |
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99 | +}; |
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100 | + |
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101 | +static const struct pinctrl_pin_desc bcm6328_pins[] = { |
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102 | + PINCTRL_PIN(0, "gpio0"), |
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103 | + PINCTRL_PIN(1, "gpio1"), |
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104 | + PINCTRL_PIN(2, "gpio2"), |
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105 | + PINCTRL_PIN(3, "gpio3"), |
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106 | + PINCTRL_PIN(4, "gpio4"), |
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107 | + PINCTRL_PIN(5, "gpio5"), |
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108 | + PINCTRL_PIN(6, "gpio6"), |
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109 | + PINCTRL_PIN(7, "gpio7"), |
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110 | + PINCTRL_PIN(8, "gpio8"), |
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111 | + PINCTRL_PIN(9, "gpio9"), |
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112 | + PINCTRL_PIN(10, "gpio10"), |
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113 | + PINCTRL_PIN(11, "gpio11"), |
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114 | + PINCTRL_PIN(12, "gpio12"), |
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115 | + PINCTRL_PIN(13, "gpio13"), |
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116 | + PINCTRL_PIN(14, "gpio14"), |
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117 | + PINCTRL_PIN(15, "gpio15"), |
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118 | + PINCTRL_PIN(16, "gpio16"), |
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119 | + PINCTRL_PIN(17, "gpio17"), |
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120 | + PINCTRL_PIN(18, "gpio18"), |
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121 | + PINCTRL_PIN(19, "gpio19"), |
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122 | + PINCTRL_PIN(20, "gpio20"), |
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123 | + PINCTRL_PIN(21, "gpio21"), |
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124 | + PINCTRL_PIN(22, "gpio22"), |
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125 | + PINCTRL_PIN(23, "gpio23"), |
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126 | + PINCTRL_PIN(24, "gpio24"), |
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127 | + PINCTRL_PIN(25, "gpio25"), |
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128 | + PINCTRL_PIN(26, "gpio26"), |
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129 | + PINCTRL_PIN(27, "gpio27"), |
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130 | + PINCTRL_PIN(28, "gpio28"), |
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131 | + PINCTRL_PIN(29, "gpio29"), |
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132 | + PINCTRL_PIN(30, "gpio30"), |
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133 | + PINCTRL_PIN(31, "gpio31"), |
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134 | + |
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135 | + /* |
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136 | + * No idea where they really are; so let's put them according |
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137 | + * to their mux offsets. |
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138 | + */ |
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139 | + PINCTRL_PIN(36, "hsspi_cs1"), |
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140 | + PINCTRL_PIN(38, "usb_p2"), |
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141 | +}; |
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142 | + |
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143 | +static unsigned gpio0_pins[] = { 0 }; |
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144 | +static unsigned gpio1_pins[] = { 1 }; |
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145 | +static unsigned gpio2_pins[] = { 2 }; |
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146 | +static unsigned gpio3_pins[] = { 3 }; |
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147 | +static unsigned gpio4_pins[] = { 4 }; |
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148 | +static unsigned gpio5_pins[] = { 5 }; |
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149 | +static unsigned gpio6_pins[] = { 6 }; |
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150 | +static unsigned gpio7_pins[] = { 7 }; |
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151 | +static unsigned gpio8_pins[] = { 8 }; |
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152 | +static unsigned gpio9_pins[] = { 9 }; |
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153 | +static unsigned gpio10_pins[] = { 10 }; |
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154 | +static unsigned gpio11_pins[] = { 11 }; |
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155 | +static unsigned gpio12_pins[] = { 12 }; |
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156 | +static unsigned gpio13_pins[] = { 13 }; |
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157 | +static unsigned gpio14_pins[] = { 14 }; |
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158 | +static unsigned gpio15_pins[] = { 15 }; |
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159 | +static unsigned gpio16_pins[] = { 16 }; |
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160 | +static unsigned gpio17_pins[] = { 17 }; |
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161 | +static unsigned gpio18_pins[] = { 18 }; |
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162 | +static unsigned gpio19_pins[] = { 19 }; |
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163 | +static unsigned gpio20_pins[] = { 20 }; |
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164 | +static unsigned gpio21_pins[] = { 21 }; |
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165 | +static unsigned gpio22_pins[] = { 22 }; |
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166 | +static unsigned gpio23_pins[] = { 23 }; |
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167 | +static unsigned gpio24_pins[] = { 24 }; |
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168 | +static unsigned gpio25_pins[] = { 25 }; |
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169 | +static unsigned gpio26_pins[] = { 26 }; |
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170 | +static unsigned gpio27_pins[] = { 27 }; |
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171 | +static unsigned gpio28_pins[] = { 28 }; |
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172 | +static unsigned gpio29_pins[] = { 29 }; |
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173 | +static unsigned gpio30_pins[] = { 30 }; |
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174 | +static unsigned gpio31_pins[] = { 31 }; |
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175 | + |
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176 | +static unsigned hsspi_cs1_pins[] = { 36 }; |
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177 | +static unsigned usb_port1_pins[] = { 38 }; |
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178 | + |
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179 | +#define BCM6328_GROUP(n) \ |
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180 | + { \ |
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181 | + .name = #n, \ |
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182 | + .pins = n##_pins, \ |
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183 | + .num_pins = ARRAY_SIZE(n##_pins), \ |
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184 | + } |
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185 | + |
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186 | +static struct bcm6328_pingroup bcm6328_groups[] = { |
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187 | + BCM6328_GROUP(gpio0), |
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188 | + BCM6328_GROUP(gpio1), |
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189 | + BCM6328_GROUP(gpio2), |
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190 | + BCM6328_GROUP(gpio3), |
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191 | + BCM6328_GROUP(gpio4), |
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192 | + BCM6328_GROUP(gpio5), |
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193 | + BCM6328_GROUP(gpio6), |
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194 | + BCM6328_GROUP(gpio7), |
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195 | + BCM6328_GROUP(gpio8), |
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196 | + BCM6328_GROUP(gpio9), |
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197 | + BCM6328_GROUP(gpio10), |
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198 | + BCM6328_GROUP(gpio11), |
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199 | + BCM6328_GROUP(gpio12), |
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200 | + BCM6328_GROUP(gpio13), |
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201 | + BCM6328_GROUP(gpio14), |
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202 | + BCM6328_GROUP(gpio15), |
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203 | + BCM6328_GROUP(gpio16), |
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204 | + BCM6328_GROUP(gpio17), |
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205 | + BCM6328_GROUP(gpio18), |
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206 | + BCM6328_GROUP(gpio19), |
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207 | + BCM6328_GROUP(gpio20), |
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208 | + BCM6328_GROUP(gpio21), |
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209 | + BCM6328_GROUP(gpio22), |
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210 | + BCM6328_GROUP(gpio23), |
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211 | + BCM6328_GROUP(gpio24), |
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212 | + BCM6328_GROUP(gpio25), |
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213 | + BCM6328_GROUP(gpio26), |
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214 | + BCM6328_GROUP(gpio27), |
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215 | + BCM6328_GROUP(gpio28), |
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216 | + BCM6328_GROUP(gpio29), |
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217 | + BCM6328_GROUP(gpio30), |
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218 | + BCM6328_GROUP(gpio31), |
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219 | + |
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220 | + BCM6328_GROUP(hsspi_cs1), |
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221 | + BCM6328_GROUP(usb_port1), |
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222 | +}; |
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223 | + |
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224 | +/* GPIO_MODE */ |
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225 | +static const char * const led_groups[] = { |
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226 | + "gpio0", |
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227 | + "gpio1", |
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228 | + "gpio2", |
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229 | + "gpio3", |
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230 | + "gpio4", |
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231 | + "gpio5", |
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232 | + "gpio6", |
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233 | + "gpio7", |
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234 | + "gpio8", |
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235 | + "gpio9", |
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236 | + "gpio10", |
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237 | + "gpio11", |
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238 | + "gpio12", |
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239 | + "gpio13", |
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240 | + "gpio14", |
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241 | + "gpio15", |
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242 | + "gpio16", |
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243 | + "gpio17", |
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244 | + "gpio18", |
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245 | + "gpio19", |
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246 | + "gpio20", |
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247 | + "gpio21", |
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248 | + "gpio22", |
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249 | + "gpio23", |
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250 | +}; |
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251 | + |
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252 | +/* PINMUX_SEL */ |
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253 | +static const char * const serial_led_data_groups[] = { |
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254 | + "gpio6", |
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255 | +}; |
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256 | + |
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257 | +static const char * const serial_led_clk_groups[] = { |
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258 | + "gpio7", |
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259 | +}; |
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260 | + |
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261 | +static const char * const inet_act_led_groups[] = { |
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262 | + "gpio11", |
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263 | +}; |
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264 | + |
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265 | +static const char * const pcie_clkreq_groups[] = { |
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266 | + "gpio16", |
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267 | +}; |
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268 | + |
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269 | +static const char * const ephy0_act_led_groups[] = { |
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270 | + "gpio25", |
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271 | +}; |
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272 | + |
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273 | +static const char * const ephy1_act_led_groups[] = { |
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274 | + "gpio26", |
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275 | +}; |
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276 | + |
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277 | +static const char * const ephy2_act_led_groups[] = { |
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278 | + "gpio27", |
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279 | +}; |
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280 | + |
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281 | +static const char * const ephy3_act_led_groups[] = { |
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282 | + "gpio28", |
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283 | +}; |
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284 | + |
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285 | +static const char * const hsspi_cs1_groups[] = { |
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286 | + "hsspi_cs1" |
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287 | +}; |
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288 | + |
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289 | +static const char * const usb_host_port_groups[] = { |
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290 | + "usb_port1", |
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291 | +}; |
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292 | + |
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293 | +static const char * const usb_device_port_groups[] = { |
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294 | + "usb_port1", |
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295 | +}; |
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296 | + |
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297 | +#define BCM6328_MODE_FUN(n) \ |
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298 | + { \ |
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299 | + .name = #n, \ |
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300 | + .groups = n##_groups, \ |
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301 | + .num_groups = ARRAY_SIZE(n##_groups), \ |
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302 | + .mode_val = 1, \ |
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303 | + } |
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304 | + |
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305 | +#define BCM6328_MUX_FUN(n, mux) \ |
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306 | + { \ |
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307 | + .name = #n, \ |
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308 | + .groups = n##_groups, \ |
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309 | + .num_groups = ARRAY_SIZE(n##_groups), \ |
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310 | + .mux_val = mux, \ |
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311 | + } |
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312 | + |
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313 | +static const struct bcm6328_function bcm6328_funcs[] = { |
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314 | + BCM6328_MODE_FUN(led), |
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315 | + BCM6328_MUX_FUN(serial_led_data, 2), |
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316 | + BCM6328_MUX_FUN(serial_led_clk, 2), |
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317 | + BCM6328_MUX_FUN(inet_act_led, 1), |
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318 | + BCM6328_MUX_FUN(pcie_clkreq, 2), |
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319 | + BCM6328_MUX_FUN(ephy0_act_led, 1), |
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320 | + BCM6328_MUX_FUN(ephy1_act_led, 1), |
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321 | + BCM6328_MUX_FUN(ephy2_act_led, 1), |
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322 | + BCM6328_MUX_FUN(ephy3_act_led, 1), |
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323 | + BCM6328_MUX_FUN(hsspi_cs1, 2), |
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324 | + BCM6328_MUX_FUN(usb_host_port, 1), |
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325 | + BCM6328_MUX_FUN(usb_device_port, 2), |
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326 | +}; |
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327 | + |
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328 | +static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev) |
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329 | +{ |
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330 | + return ARRAY_SIZE(bcm6328_groups); |
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331 | +} |
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332 | + |
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333 | +static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev, |
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334 | + unsigned group) |
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335 | +{ |
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336 | + return bcm6328_groups[group].name; |
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337 | +} |
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338 | + |
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339 | +static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, |
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340 | + unsigned group, const unsigned **pins, |
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341 | + unsigned *num_pins) |
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342 | +{ |
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343 | + *pins = bcm6328_groups[group].pins; |
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344 | + *num_pins = bcm6328_groups[group].num_pins; |
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345 | + |
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346 | + return 0; |
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347 | +} |
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348 | + |
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349 | +static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev) |
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350 | +{ |
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351 | + return ARRAY_SIZE(bcm6328_funcs); |
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352 | +} |
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353 | + |
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354 | +static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev, |
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355 | + unsigned selector) |
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356 | +{ |
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357 | + return bcm6328_funcs[selector].name; |
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358 | +} |
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359 | + |
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360 | +static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev, |
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361 | + unsigned selector, |
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362 | + const char * const **groups, |
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363 | + unsigned * const num_groups) |
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364 | +{ |
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365 | + *groups = bcm6328_funcs[selector].groups; |
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366 | + *num_groups = bcm6328_funcs[selector].num_groups; |
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367 | + |
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368 | + return 0; |
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369 | +} |
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370 | + |
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371 | +static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin, |
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372 | + u32 mode, u32 mux) |
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373 | +{ |
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374 | + unsigned long flags; |
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375 | + u32 reg; |
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376 | + |
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377 | + spin_lock_irqsave(&pctl->lock, flags); |
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378 | + if (pin < 32) { |
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379 | + reg = __raw_readl(pctl->mode); |
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380 | + reg &= ~BIT(pin); |
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381 | + if (mode) |
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382 | + reg |= BIT(pin); |
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383 | + __raw_writel(reg, pctl->mode); |
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384 | + } |
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385 | + |
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386 | + reg = __raw_readl(pctl->mux[pin / 16]); |
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387 | + reg &= ~(3UL << ((pin % 16) * 2)); |
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388 | + reg |= mux << ((pin % 16) * 2); |
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389 | + __raw_writel(reg, pctl->mux[pin / 16]); |
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390 | + |
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391 | + spin_unlock_irqrestore(&pctl->lock, flags); |
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392 | +} |
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393 | + |
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394 | +static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev, |
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395 | + unsigned selector, unsigned group) |
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396 | +{ |
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397 | + struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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398 | + const struct bcm6328_pingroup *grp = &bcm6328_groups[group]; |
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399 | + const struct bcm6328_function *f = &bcm6328_funcs[selector]; |
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400 | + |
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401 | + bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val); |
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402 | + |
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403 | + return 0; |
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404 | +} |
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405 | + |
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406 | +static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev, |
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407 | + struct pinctrl_gpio_range *range, |
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408 | + unsigned offset) |
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409 | +{ |
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410 | + struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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411 | + |
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412 | + /* disable all functions using this pin */ |
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413 | + bcm6328_rmw_mux(pctl, offset, 0, 0); |
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414 | + |
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415 | + return 0; |
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416 | +} |
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417 | + |
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418 | +static struct pinctrl_ops bcm6328_pctl_ops = { |
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419 | + .get_groups_count = bcm6328_pinctrl_get_group_count, |
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420 | + .get_group_name = bcm6328_pinctrl_get_group_name, |
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421 | + .get_group_pins = bcm6328_pinctrl_get_group_pins, |
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422 | +#ifdef CONFIG_OF |
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423 | + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, |
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424 | + .dt_free_map = pinctrl_utils_free_map, |
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425 | +#endif |
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426 | +}; |
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427 | + |
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428 | +static struct pinmux_ops bcm6328_pmx_ops = { |
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429 | + .get_functions_count = bcm6328_pinctrl_get_func_count, |
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430 | + .get_function_name = bcm6328_pinctrl_get_func_name, |
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431 | + .get_function_groups = bcm6328_pinctrl_get_groups, |
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432 | + .set_mux = bcm6328_pinctrl_set_mux, |
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433 | + .gpio_request_enable = bcm6328_gpio_request_enable, |
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434 | + .strict = true, |
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435 | +}; |
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436 | + |
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437 | +static int bcm6328_pinctrl_probe(struct platform_device *pdev) |
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438 | +{ |
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439 | + struct bcm6328_pinctrl *pctl; |
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440 | + struct resource *res; |
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441 | + void __iomem *mode, *mux; |
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442 | + |
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443 | + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); |
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444 | + mode = devm_ioremap_resource(&pdev->dev, res); |
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445 | + if (IS_ERR(mode)) |
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446 | + return PTR_ERR(mode); |
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447 | + |
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448 | + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux"); |
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449 | + mux = devm_ioremap_resource(&pdev->dev, res); |
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450 | + if (IS_ERR(mux)) |
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451 | + return PTR_ERR(mux); |
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452 | + |
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453 | + pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); |
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454 | + if (!pctl) |
||
455 | + return -ENOMEM; |
||
456 | + |
||
457 | + spin_lock_init(&pctl->lock); |
||
458 | + |
||
459 | + pctl->mode = mode; |
||
460 | + pctl->mux[0] = mux + BCM6328_MUX_LO_REG; |
||
461 | + pctl->mux[1] = mux + BCM6328_MUX_HI_REG; |
||
462 | + pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG; |
||
463 | + |
||
464 | + pctl->desc.name = dev_name(&pdev->dev); |
||
465 | + pctl->desc.owner = THIS_MODULE; |
||
466 | + pctl->desc.pctlops = &bcm6328_pctl_ops; |
||
467 | + pctl->desc.pmxops = &bcm6328_pmx_ops; |
||
468 | + |
||
469 | + pctl->desc.npins = ARRAY_SIZE(bcm6328_pins); |
||
470 | + pctl->desc.pins = bcm6328_pins; |
||
471 | + |
||
472 | + platform_set_drvdata(pdev, pctl); |
||
473 | + |
||
474 | + pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, |
||
475 | + &pctl->gpio, BCM6328_NGPIO); |
||
476 | + if (IS_ERR(pctl->pctldev)) |
||
477 | + return PTR_ERR(pctl->pctldev); |
||
478 | + |
||
479 | + return 0; |
||
480 | +} |
||
481 | + |
||
482 | +static const struct of_device_id bcm6328_pinctrl_match[] = { |
||
483 | + { .compatible = "brcm,bcm6328-pinctrl", }, |
||
484 | + { }, |
||
485 | +}; |
||
486 | + |
||
487 | +static struct platform_driver bcm6328_pinctrl_driver = { |
||
488 | + .probe = bcm6328_pinctrl_probe, |
||
489 | + .driver = { |
||
490 | + .name = "bcm6328-pinctrl", |
||
491 | + .of_match_table = bcm6328_pinctrl_match, |
||
492 | + }, |
||
493 | +}; |
||
494 | + |
||
495 | +builtin_platform_driver(bcm6328_pinctrl_driver); |