OpenWrt – Blame information for rev 2
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001 |
2 | From: Florian Fainelli <florian@openwrt.org> |
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3 | Date: Mon, 28 Jan 2013 20:06:19 +0100 |
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4 | Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay |
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5 | |||
6 | Knowledge of the clock setup delay should remain at the clock level (so |
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7 | it can be clock specific and CPU specific). Add the 100 milliseconds |
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8 | required clock delay for the USB host clock when it gets enabled. |
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9 | |||
10 | Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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11 | --- |
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12 | arch/mips/bcm63xx/clk.c | 5 +++++ |
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13 | 1 file changed, 5 insertions(+) |
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14 | |||
15 | --- a/arch/mips/bcm63xx/clk.c |
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16 | +++ b/arch/mips/bcm63xx/clk.c |
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17 | @@ -213,6 +213,11 @@ static void usbh_set(struct clk *clk, in |
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18 | bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); |
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19 | else if (BCMCPU_IS_6368()) |
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20 | bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); |
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21 | + else |
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22 | + return; |
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23 | + |
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24 | + if (enable) |
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25 | + msleep(100); |
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26 | } |
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27 | |||
28 | static struct clk clk_usbh = { |