OpenWrt – Blame information for rev 3
?pathlinks?
Rev | Author | Line No. | Line |
---|---|---|---|
1 | office | 1 | From 302f69453721e5ee19f583339a3a646821d4a173 Mon Sep 17 00:00:00 2001 |
2 | From: Jonas Gorski <jogo@openwrt.org> |
||
3 | Date: Fri, 20 Feb 2015 23:58:54 +0100 |
||
4 | Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver |
||
5 | |||
6 | Signed-off-by: Jonas Gorski <jogo@openwrt.org> |
||
7 | --- |
||
8 | arch/mips/bcm63xx/boards/board_common.c | 2 + |
||
9 | arch/mips/bcm63xx/gpio.c | 145 ++++++++++------------------------------------ |
||
10 | arch/mips/bcm63xx/setup.c | 3 - |
||
11 | 3 files changed, 32 insertions(+), 118 deletions(-) |
||
12 | |||
13 | --- a/arch/mips/bcm63xx/boards/board_common.c |
||
14 | +++ b/arch/mips/bcm63xx/boards/board_common.c |
||
3 | office | 15 | @@ -189,6 +189,8 @@ int __init board_register_devices(void) |
1 | office | 16 | } |
17 | #endif |
||
18 | |||
19 | + bcm63xx_gpio_init(); |
||
20 | + |
||
21 | if (board.has_uart0) |
||
22 | bcm63xx_uart_register(0); |
||
23 | |||
24 | --- a/arch/mips/bcm63xx/gpio.c |
||
25 | +++ b/arch/mips/bcm63xx/gpio.c |
||
26 | @@ -5,147 +5,62 @@ |
||
27 | * |
||
28 | * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> |
||
29 | * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org> |
||
30 | + * Copyright (C) Jonas Gorski <jogo@openwrt.org> |
||
31 | */ |
||
32 | |||
33 | #include <linux/kernel.h> |
||
34 | #include <linux/init.h> |
||
35 | -#include <linux/spinlock.h> |
||
36 | #include <linux/platform_device.h> |
||
37 | #include <linux/gpio/driver.h> |
||
38 | |||
39 | #include <bcm63xx_cpu.h> |
||
40 | #include <bcm63xx_gpio.h> |
||
41 | -#include <bcm63xx_io.h> |
||
42 | #include <bcm63xx_regs.h> |
||
43 | |||
44 | -static u32 gpio_out_low_reg; |
||
45 | - |
||
46 | -static void bcm63xx_gpio_out_low_reg_init(void) |
||
47 | +static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio) |
||
48 | { |
||
49 | - switch (bcm63xx_get_cpu_id()) { |
||
50 | - case BCM6345_CPU_ID: |
||
51 | - gpio_out_low_reg = GPIO_DATA_LO_REG_6345; |
||
52 | - break; |
||
53 | - default: |
||
54 | - gpio_out_low_reg = GPIO_DATA_LO_REG; |
||
55 | - break; |
||
56 | - } |
||
57 | -} |
||
58 | - |
||
59 | -static DEFINE_SPINLOCK(bcm63xx_gpio_lock); |
||
60 | -static u32 gpio_out_low, gpio_out_high; |
||
61 | + struct resource res[2]; |
||
62 | + struct bgpio_pdata pdata; |
||
63 | |||
64 | -static void bcm63xx_gpio_set(struct gpio_chip *chip, |
||
65 | - unsigned gpio, int val) |
||
66 | -{ |
||
67 | - u32 reg; |
||
68 | - u32 mask; |
||
69 | - u32 *v; |
||
70 | - unsigned long flags; |
||
71 | - |
||
72 | - if (gpio >= chip->ngpio) |
||
73 | - BUG(); |
||
74 | - |
||
75 | - if (gpio < 32) { |
||
76 | - reg = gpio_out_low_reg; |
||
77 | - mask = 1 << gpio; |
||
78 | - v = &gpio_out_low; |
||
79 | - } else { |
||
80 | - reg = GPIO_DATA_HI_REG; |
||
81 | - mask = 1 << (gpio - 32); |
||
82 | - v = &gpio_out_high; |
||
83 | - } |
||
84 | - |
||
85 | - spin_lock_irqsave(&bcm63xx_gpio_lock, flags); |
||
86 | - if (val) |
||
87 | - *v |= mask; |
||
88 | - else |
||
89 | - *v &= ~mask; |
||
90 | - bcm_gpio_writel(*v, reg); |
||
91 | - spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags); |
||
92 | -} |
||
93 | + memset(res, 0, sizeof(res)); |
||
94 | + memset(&pdata, 0, sizeof(pdata)); |
||
95 | |||
96 | -static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio) |
||
97 | -{ |
||
98 | - u32 reg; |
||
99 | - u32 mask; |
||
100 | + res[0].flags = IORESOURCE_MEM; |
||
101 | + res[0].start = bcm63xx_regset_address(RSET_GPIO); |
||
102 | + res[0].start += dir; |
||
103 | |||
104 | - if (gpio >= chip->ngpio) |
||
105 | - BUG(); |
||
106 | + res[0].end = res[0].start + 3; |
||
107 | |||
108 | - if (gpio < 32) { |
||
109 | - reg = gpio_out_low_reg; |
||
110 | - mask = 1 << gpio; |
||
111 | - } else { |
||
112 | - reg = GPIO_DATA_HI_REG; |
||
113 | - mask = 1 << (gpio - 32); |
||
114 | - } |
||
115 | + res[1].flags = IORESOURCE_MEM; |
||
116 | + res[1].start = bcm63xx_regset_address(RSET_GPIO); |
||
117 | + res[1].start += data; |
||
118 | |||
119 | - return !!(bcm_gpio_readl(reg) & mask); |
||
120 | -} |
||
121 | + res[1].end = res[1].start + 3; |
||
122 | |||
123 | -static int bcm63xx_gpio_set_direction(struct gpio_chip *chip, |
||
124 | - unsigned gpio, int dir) |
||
125 | -{ |
||
126 | - u32 reg; |
||
127 | - u32 mask; |
||
128 | - u32 tmp; |
||
129 | - unsigned long flags; |
||
130 | - |
||
131 | - if (gpio >= chip->ngpio) |
||
132 | - BUG(); |
||
133 | - |
||
134 | - if (gpio < 32) { |
||
135 | - reg = GPIO_CTL_LO_REG; |
||
136 | - mask = 1 << gpio; |
||
137 | - } else { |
||
138 | - reg = GPIO_CTL_HI_REG; |
||
139 | - mask = 1 << (gpio - 32); |
||
140 | - } |
||
141 | - |
||
142 | - spin_lock_irqsave(&bcm63xx_gpio_lock, flags); |
||
143 | - tmp = bcm_gpio_readl(reg); |
||
144 | - if (dir == BCM63XX_GPIO_DIR_IN) |
||
145 | - tmp &= ~mask; |
||
146 | - else |
||
147 | - tmp |= mask; |
||
148 | - bcm_gpio_writel(tmp, reg); |
||
149 | - spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags); |
||
150 | + pdata.base = id * 32; |
||
151 | + pdata.ngpio = ngpio; |
||
152 | |||
153 | - return 0; |
||
154 | + platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2, |
||
155 | + &pdata, sizeof(pdata)); |
||
156 | } |
||
157 | |||
158 | -static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) |
||
159 | +int __init bcm63xx_gpio_init(void) |
||
160 | { |
||
161 | - return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN); |
||
162 | -} |
||
163 | + int ngpio = bcm63xx_gpio_count(); |
||
164 | + int data_low_reg; |
||
165 | |||
166 | -static int bcm63xx_gpio_direction_output(struct gpio_chip *chip, |
||
167 | - unsigned gpio, int value) |
||
168 | -{ |
||
169 | - bcm63xx_gpio_set(chip, gpio, value); |
||
170 | - return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT); |
||
171 | -} |
||
172 | + if (BCMCPU_IS_6345()) |
||
173 | + data_low_reg = GPIO_DATA_LO_REG_6345; |
||
174 | + else |
||
175 | + data_low_reg = GPIO_DATA_LO_REG; |
||
176 | |||
177 | + bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32)); |
||
178 | |||
179 | -static struct gpio_chip bcm63xx_gpio_chip = { |
||
180 | - .label = "bcm63xx-gpio", |
||
181 | - .direction_input = bcm63xx_gpio_direction_input, |
||
182 | - .direction_output = bcm63xx_gpio_direction_output, |
||
183 | - .get = bcm63xx_gpio_get, |
||
184 | - .set = bcm63xx_gpio_set, |
||
185 | - .base = 0, |
||
186 | -}; |
||
187 | + if (ngpio <= 32) |
||
188 | + return 0; |
||
189 | |||
190 | -int __init bcm63xx_gpio_init(void) |
||
191 | -{ |
||
192 | - bcm63xx_gpio_out_low_reg_init(); |
||
193 | + bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32); |
||
194 | |||
195 | - gpio_out_low = bcm_gpio_readl(gpio_out_low_reg); |
||
196 | - if (!BCMCPU_IS_6345()) |
||
197 | - gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG); |
||
198 | - bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count(); |
||
199 | - pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio); |
||
200 | + return 0; |
||
201 | |||
202 | - return gpiochip_add_data(&bcm63xx_gpio_chip, NULL); |
||
203 | } |
||
204 | --- a/arch/mips/bcm63xx/setup.c |
||
205 | +++ b/arch/mips/bcm63xx/setup.c |
||
206 | @@ -164,9 +164,6 @@ void __init plat_mem_setup(void) |
||
207 | |||
208 | int __init bcm63xx_register_devices(void) |
||
209 | { |
||
210 | - /* register gpiochip */ |
||
211 | - bcm63xx_gpio_init(); |
||
212 | - |
||
213 | return board_register_devices(); |
||
214 | } |
||
215 |