OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001 |
2 | From: Florian Fainelli <florian@openwrt.org> |
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3 | Date: Mon, 28 Jan 2013 20:06:22 +0100 |
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4 | Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to |
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5 | common USB code |
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6 | |||
7 | This patch updates the common USB code touching the USB private |
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8 | registers with the specific bits to properly enable OHCI and EHCI |
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9 | controllers on BCM63xx SoCs. As a result we now need to protect access |
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10 | to Read Modify Write sequences using a spinlock because we cannot |
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11 | guarantee that any of the exposed helper will not be called |
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12 | concurrently. |
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13 | |||
14 | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> |
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15 | Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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16 | --- |
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17 | arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++ |
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18 | .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 + |
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19 | 2 files changed, 99 insertions(+) |
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20 | |||
21 | --- a/arch/mips/bcm63xx/usb-common.c |
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22 | +++ b/arch/mips/bcm63xx/usb-common.c |
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23 | @@ -5,10 +5,12 @@ |
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24 | * License. See the file "COPYING" in the main directory of this archive |
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25 | * for more details. |
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26 | * |
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27 | + * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> |
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28 | * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com> |
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29 | * Copyright (C) 2012 Broadcom Corporation |
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30 | * |
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31 | */ |
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32 | +#include <linux/spinlock.h> |
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33 | #include <linux/export.h> |
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34 | |||
35 | #include <bcm63xx_cpu.h> |
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36 | @@ -16,9 +18,14 @@ |
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37 | #include <bcm63xx_io.h> |
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38 | #include <bcm63xx_usb_priv.h> |
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39 | |||
40 | +static DEFINE_SPINLOCK(usb_priv_reg_lock); |
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41 | + |
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42 | void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) |
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43 | { |
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44 | u32 val; |
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45 | + unsigned long flags; |
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46 | + |
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47 | + spin_lock_irqsave(&usb_priv_reg_lock, flags); |
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48 | |||
49 | val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); |
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50 | if (is_device) { |
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51 | @@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3 |
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52 | else |
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53 | val &= ~USBH_PRIV_SWAP_USBD_MASK; |
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54 | bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); |
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55 | + |
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56 | + spin_unlock_irqrestore(&usb_priv_reg_lock, flags); |
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57 | } |
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58 | EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); |
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59 | |||
60 | void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) |
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61 | { |
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62 | u32 val; |
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63 | + unsigned long flags; |
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64 | + |
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65 | + spin_lock_irqsave(&usb_priv_reg_lock, flags); |
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66 | |||
67 | val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); |
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68 | if (is_on) |
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69 | @@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32 |
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70 | else |
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71 | val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); |
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72 | bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); |
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73 | + |
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74 | + spin_unlock_irqrestore(&usb_priv_reg_lock, flags); |
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75 | } |
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76 | EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); |
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77 | + |
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78 | +/* The following array represents the meaning of the DESC/DATA |
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79 | + * endian swapping with respect to the CPU configured endianness |
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80 | + * |
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81 | + * DATA ENDN mmio descriptor |
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82 | + * 0 0 BE invalid |
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83 | + * 0 1 BE LE |
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84 | + * 1 0 BE BE |
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85 | + * 1 1 BE invalid |
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86 | + * |
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87 | + * Since BCM63XX SoCs are configured to be in big-endian mode |
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88 | + * we want configuration at line 3. |
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89 | + */ |
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90 | +void bcm63xx_usb_priv_ohci_cfg_set(void) |
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91 | +{ |
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92 | + u32 reg; |
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93 | + unsigned long flags; |
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94 | + |
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95 | + spin_lock_irqsave(&usb_priv_reg_lock, flags); |
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96 | + |
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97 | + if (BCMCPU_IS_6348()) |
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98 | + bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG); |
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99 | + else if (BCMCPU_IS_6358()) { |
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100 | + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); |
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101 | + reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; |
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102 | + reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; |
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103 | + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); |
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104 | + /* |
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105 | + * The magic value comes for the original vendor BSP |
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106 | + * and is needed for USB to work. Datasheet does not |
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107 | + * help, so the magic value is used as-is. |
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108 | + */ |
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109 | + bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, |
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110 | + USBH_PRIV_TEST_6358_REG); |
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111 | + |
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112 | + } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { |
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113 | + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); |
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114 | + reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; |
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115 | + reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; |
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116 | + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); |
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117 | + |
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118 | + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); |
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119 | + reg |= USBH_PRIV_SETUP_IOC_MASK; |
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120 | + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); |
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121 | + } |
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122 | + |
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123 | + spin_unlock_irqrestore(&usb_priv_reg_lock, flags); |
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124 | +} |
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125 | + |
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126 | +void bcm63xx_usb_priv_ehci_cfg_set(void) |
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127 | +{ |
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128 | + u32 reg; |
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129 | + unsigned long flags; |
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130 | + |
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131 | + spin_lock_irqsave(&usb_priv_reg_lock, flags); |
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132 | + |
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133 | + if (BCMCPU_IS_6358()) { |
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134 | + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); |
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135 | + reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; |
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136 | + reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; |
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137 | + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); |
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138 | + |
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139 | + /* |
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140 | + * The magic value comes for the original vendor BSP |
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141 | + * and is needed for USB to work. Datasheet does not |
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142 | + * help, so the magic value is used as-is. |
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143 | + */ |
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144 | + bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, |
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145 | + USBH_PRIV_TEST_6358_REG); |
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146 | + |
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147 | + } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { |
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148 | + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); |
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149 | + reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; |
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150 | + reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; |
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151 | + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); |
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152 | + |
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153 | + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); |
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154 | + reg |= USBH_PRIV_SETUP_IOC_MASK; |
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155 | + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); |
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156 | + } |
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157 | + |
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158 | + spin_unlock_irqrestore(&usb_priv_reg_lock, flags); |
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159 | +} |
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160 | --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h |
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161 | +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h |
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162 | @@ -5,5 +5,7 @@ |
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163 | |||
164 | void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); |
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165 | void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); |
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166 | +void bcm63xx_usb_priv_ohci_cfg_set(void); |
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167 | +void bcm63xx_usb_priv_ehci_cfg_set(void); |
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168 | |||
169 | #endif /* BCM63XX_USB_PRIV_H_ */ |