OpenWrt – Blame information for rev 2

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1 office 1 From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Sat, 23 Jun 2018 15:07:37 +0200
4 Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF
5  
6 With the ath79 target getting converted to pure OF, we can drop all the
7 platform data code and add the missing OF bits to the driver. We also add
8 a irq domain for the PCI/e controllers cascade, thus making it usable from
9 dts files.
10  
11 Signed-off-by: John Crispin <john@phrozen.org>
12 ---
13 arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------
14 1 file changed, 42 insertions(+), 46 deletions(-)
15  
16 --- a/arch/mips/pci/pci-ar724x.c
17 +++ b/arch/mips/pci/pci-ar724x.c
18 @@ -14,8 +14,11 @@
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/platform_device.h>
22 +#include <linux/irqchip/chained_irq.h>
23 #include <asm/mach-ath79/ath79.h>
24 #include <asm/mach-ath79/ar71xx_regs.h>
25 +#include <linux/of_irq.h>
26 +#include <linux/of_pci.h>
27  
28 #define AR724X_PCI_REG_APP 0x00
29 #define AR724X_PCI_REG_RESET 0x18
30 @@ -45,17 +48,20 @@ struct ar724x_pci_controller {
31 void __iomem *crp_base;
32  
33 int irq;
34 - int irq_base;
35  
36 bool link_up;
37 bool bar0_is_cached;
38 u32 bar0_value;
39  
40 + struct device_node *np;
41 struct pci_controller pci_controller;
42 + struct irq_domain *domain;
43 struct resource io_res;
44 struct resource mem_res;
45 };
46  
47 +static struct irq_chip ar724x_pci_irq_chip;
48 +
49 static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
50 {
51 u32 reset;
52 @@ -231,35 +237,31 @@ static struct pci_ops ar724x_pci_ops = {
53  
54 static void ar724x_pci_irq_handler(struct irq_desc *desc)
55 {
56 - struct ar724x_pci_controller *apc;
57 - void __iomem *base;
58 + struct irq_chip *chip = irq_desc_get_chip(desc);
59 + struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc);
60 u32 pending;
61  
62 - apc = irq_desc_get_handler_data(desc);
63 - base = apc->ctrl_base;
64 -
65 - pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &
66 - __raw_readl(base + AR724X_PCI_REG_INT_MASK);
67 + chained_irq_enter(chip, desc);
68 + pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) &
69 + __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK);
70  
71 if (pending & AR724X_PCI_INT_DEV0)
72 - generic_handle_irq(apc->irq_base + 0);
73 -
74 + generic_handle_irq(irq_linear_revmap(apc->domain, 1));
75 else
76 spurious_interrupt();
77 + chained_irq_exit(chip, desc);
78 }
79  
80 static void ar724x_pci_irq_unmask(struct irq_data *d)
81 {
82 struct ar724x_pci_controller *apc;
83 void __iomem *base;
84 - int offset;
85 u32 t;
86  
87 apc = irq_data_get_irq_chip_data(d);
88 base = apc->ctrl_base;
89 - offset = apc->irq_base - d->irq;
90  
91 - switch (offset) {
92 + switch (irq_linear_revmap(apc->domain, d->irq)) {
93 case 0:
94 t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
95 __raw_writel(t | AR724X_PCI_INT_DEV0,
96 @@ -273,14 +275,12 @@ static void ar724x_pci_irq_mask(struct i
97 {
98 struct ar724x_pci_controller *apc;
99 void __iomem *base;
100 - int offset;
101 u32 t;
102  
103 apc = irq_data_get_irq_chip_data(d);
104 base = apc->ctrl_base;
105 - offset = apc->irq_base - d->irq;
106  
107 - switch (offset) {
108 + switch (irq_linear_revmap(apc->domain, d->irq)) {
109 case 0:
110 t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
111 __raw_writel(t & ~AR724X_PCI_INT_DEV0,
112 @@ -305,26 +305,34 @@ static struct irq_chip ar724x_pci_irq_ch
113 .irq_mask_ack = ar724x_pci_irq_mask,
114 };
115  
116 +static int ar724x_pci_irq_map(struct irq_domain *d,
117 + unsigned int irq, irq_hw_number_t hw)
118 +{
119 + struct ar724x_pci_controller *apc = d->host_data;
120 +
121 + irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq);
122 + irq_set_chip_data(irq, apc);
123 +
124 + return 0;
125 +}
126 +
127 +static const struct irq_domain_ops ar724x_pci_domain_ops = {
128 + .xlate = irq_domain_xlate_onecell,
129 + .map = ar724x_pci_irq_map,
130 +};
131 +
132 static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
133 int id)
134 {
135 void __iomem *base;
136 - int i;
137  
138 base = apc->ctrl_base;
139  
140 __raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
141 __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
142  
143 - apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
144 -
145 - for (i = apc->irq_base;
146 - i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
147 - irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
148 - handle_level_irq);
149 - irq_set_chip_data(i, apc);
150 - }
151 -
152 + apc->domain = irq_domain_add_linear(apc->np, 2,
153 + &ar724x_pci_domain_ops, apc);
154 irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler,
155 apc);
156 }
157 @@ -394,29 +402,11 @@ static int ar724x_pci_probe(struct platf
158 if (apc->irq < 0)
159 return -EINVAL;
160  
161 - res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
162 - if (!res)
163 - return -EINVAL;
164 -
165 - apc->io_res.parent = res;
166 - apc->io_res.name = "PCI IO space";
167 - apc->io_res.start = res->start;
168 - apc->io_res.end = res->end;
169 - apc->io_res.flags = IORESOURCE_IO;
170 -
171 - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
172 - if (!res)
173 - return -EINVAL;
174 -
175 - apc->mem_res.parent = res;
176 - apc->mem_res.name = "PCI memory space";
177 - apc->mem_res.start = res->start;
178 - apc->mem_res.end = res->end;
179 - apc->mem_res.flags = IORESOURCE_MEM;
180 -
181 + apc->np = pdev->dev.of_node;
182 apc->pci_controller.pci_ops = &ar724x_pci_ops;
183 apc->pci_controller.io_resource = &apc->io_res;
184 apc->pci_controller.mem_resource = &apc->mem_res;
185 + pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node);
186  
187 /*
188 * Do the full PCIE Root Complex Initialization Sequence if the PCIe
189 @@ -438,10 +428,16 @@ static int ar724x_pci_probe(struct platf
190 return 0;
191 }
192  
193 +static const struct of_device_id ar724x_pci_ids[] = {
194 + { .compatible = "qcom,ar7240-pci" },
195 + {},
196 +};
197 +
198 static struct platform_driver ar724x_pci_driver = {
199 .probe = ar724x_pci_probe,
200 .driver = {
201 .name = "ar724x-pci",
202 + .of_match_table = of_match_ptr(ar724x_pci_ids),
203 },
204 };
205