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1 office 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
3 #include "ath79.dtsi"
4  
5 / {
6 compatible = "qca,qca9560";
7  
8 #address-cells = <1>;
9 #size-cells = <1>;
10  
11 cpus {
12 #address-cells = <1>;
13 #size-cells = <0>;
14  
15 cpu@0 {
16 device_type = "cpu";
17 compatible = "mips,mips74Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
19 reg = <0>;
20 };
21 };
22  
23 extosc: ref {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-output-names = "ref";
27 clock-frequency = <25000000>;
28 };
29  
30 ahb {
31 apb {
32 ddr_ctrl: memory-controller@18000000 {
33 compatible = "qca,qca9560-ddr-controller",
34 "qca,ar7240-ddr-controller";
35 reg = <0x18000000 0x100>;
36  
37 #qca,ddr-wb-channel-cells = <1>;
38 };
39  
40 uart: uart@18020000 {
41 compatible = "ns16550a";
42 reg = <0x18020000 0x20>;
43  
44 interrupts = <3>;
45  
46 clocks = <&pll ATH79_CLK_REF>;
47 clock-names = "uart";
48  
49 reg-io-width = <4>;
50 reg-shift = <2>;
51 no-loopback-test;
52  
53 status = "disabled";
54 };
55  
56 gpio: gpio@18040000 {
57 compatible = "qca,qca9560-gpio",
58 "qca,ar9340-gpio";
59 reg = <0x18040000 0x28>;
60  
61 interrupts = <2>;
62 ngpios = <24>;
63  
64 gpio-controller;
65 #gpio-cells = <2>;
66  
67 interrupt-controller;
68 #interrupt-cells = <2>;
69 };
70  
71 pinmux: pinmux@1804002c {
72 compatible = "pinctrl-single";
73  
74 reg = <0x1804002c 0x44>;
75  
76 #size-cells = <0>;
77  
78 pinctrl-single,bit-per-mux;
79 pinctrl-single,register-width = <32>;
80 pinctrl-single,function-mask = <0x1>;
81 #pinctrl-cells = <2>;
82  
83 jtag_disable_pins: pinmux_jtag_disable_pins {
84 pinctrl-single,bits = <0x40 0x2 0x2>;
85 };
86 };
87  
88 pll: pll-controller@18050000 {
89 compatible = "qca,qca9560-pll", "syscon";
90 reg = <0x18050000 0x50>;
91  
92 #clock-cells = <1>;
93 clock-output-names = "cpu", "ddr", "ahb";
94  
95 clocks = <&extosc>;
96 };
97  
98 wdt: wdt@18060008 {
99 compatible = "qca,ar7130-wdt";
100 reg = <0x18060008 0x8>;
101  
102 interrupts = <4>;
103  
104 clocks = <&pll ATH79_CLK_AHB>;
105 clock-names = "wdt";
106 };
107  
108 rst: reset-controller@1806001c {
109 compatible = "qca,qca9560-reset",
110 "qca,ar7100-reset";
111 reg = <0x1806001c 0x4>;
112  
113 #reset-cells = <1>;
114 interrupt-parent = <&cpuintc>;
115  
116 intc3: interrupt-controller {
117 compatible = "qca,ar9340-intc";
118  
119 interrupt-parent = <&cpuintc>;
120 interrupts = <3>;
121  
122 interrupt-controller;
123 #interrupt-cells = <1>;
124  
125 qca,int-status-addr = <0xac>;
126 qca,pending-bits = <0x1f000>, /* pcie rc */
127 <0x1000000>, /* usb1 */
128 <0x10000000>; /* usb2 */
129 };
130 };
131  
132 rst2: reset-controller@180600c0 {
133 compatible = "qca,qca9560-reset",
134 "qca,ar7100-reset",
135 "simple-bus";
136 reg = <0x180600c0 0x4>;
137  
138 #reset-cells = <1>;
139 };
140  
141 wmac: wmac@18100000 {
142 compatible = "qca,qca9560-wmac";
143 reg = <0x18100000 0x10000>;
144  
145 interrupt-parent = <&cpuintc>;
146 interrupts = <2>;
147  
148 status = "disabled";
149 };
150  
151 pcie: pcie-controller@18250000 {
152 compatible = "qcom,ar7240-pci";
153 #address-cells = <3>;
154 #size-cells = <2>;
155 bus-range = <0x0 0x0>;
156 reg = <0x18250000 0x1000>, /* CRP */
157 <0x18280000 0x100>, /* CTRL */
158 <0x16000000 0x1000>; /* CFG */
159 reg-names = "crp_base", "ctrl_base", "cfg_base";
160 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
161 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
162 interrupt-parent = <&intc3>;
163 interrupts = <0>;
164  
165 interrupt-controller;
166 #interrupt-cells = <1>;
167  
168 interrupt-map-mask = <0 0 0 1>;
169 interrupt-map = <0 0 0 0 &pcie 0>;
170 status = "disabled";
171 };
172 };
173  
174 usb0: usb@1b000000 {
175 compatible = "generic-ehci";
176 reg = <0x1b000000 0x1d8>;
177  
178 interrupt-parent = <&intc3>;
179 interrupts = <1>;
180  
181 resets = <&rst 5>;
182 reset-names = "usb-host";
183  
184 has-transaction-translator;
185 caps-offset = <0x100>;
186  
187 phy-names = "usb-phy0";
188 phys = <&usb_phy0>;
189  
190 status = "disabled";
191 };
192  
193 usb1: usb@1b400000 {
194 compatible = "generic-ehci";
195 reg = <0x1b400000 0x1d8>;
196  
197 interrupt-parent = <&intc3>;
198 interrupts = <2>;
199  
200 resets = <&rst2 5>;
201 reset-names = "usb-host";
202  
203 has-transaction-translator;
204 caps-offset = <0x100>;
205  
206 phy-names = "usb-phy1";
207 phys = <&usb_phy1>;
208  
209 status = "disabled";
210 };
211  
212 spi: spi@1f000000 {
213 compatible = "qca,qca9560-spi", "qca,ar7100-spi";
214 reg = <0x1f000000 0x10>;
215  
216 clocks = <&pll ATH79_CLK_AHB>;
217 clock-names = "ahb";
218  
219 status = "disabled";
220  
221 #address-cells = <1>;
222 #size-cells = <0>;
223 };
224  
225 gmac: gmac@18070000 {
226 compatible = "qca,qca9560-gmac";
227 reg = <0x18070000 0x64>;
228 };
229 };
230  
231 usb_phy0: usb-phy {
232 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
233  
234 reset-names = "usb-phy", "usb-suspend-override";
235 resets = <&rst 4>, <&rst 3>;
236  
237 #phy-cells = <0>;
238  
239 status = "disabled";
240 };
241  
242 usb_phy1: usb-phy {
243 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
244  
245 reset-names = "usb-phy", "usb-suspend-override";
246 resets = <&rst2 4>, <&rst2 3>;
247  
248 #phy-cells = <0>;
249  
250 status = "disabled";
251 };
252 };
253  
254 &mdio0 {
255 resets = <&rst 22>;
256 reset-names = "mdio";
257 };
258  
259 &eth0 {
260 compatible = "qca,qca9560-eth", "syscon", "simple-mfd";
261  
262 pll-data = <0x03000000 0x00000101 0x00001919>;
263 pll-reg = <0 0x48 0>;
264 pll-handle = <&pll>;
265  
266 resets = <&rst 9>;
267 reset-names = "mac";
268 };
269  
270 &mdio1 {
271 status = "okay";
272 resets = <&rst 23>;
273 reset-names = "mdio";
274 builtin-switch;
275  
276 builtin_switch: switch0@1f {
277 compatible = "qca,ar8229-builtin";
278 reg = <0x1f>;
279 resets = <&rst 8>;
280 reset-names = "switch";
281 phy-mode = "gmii";
282 phy4-mii-enable;
283  
284 mdio-bus {
285 #address-cells = <1>;
286 #size-cells = <0>;
287  
288 swphy0: ethernet-phy@0 {
289 reg = <0>;
290 phy-mode = "mii";
291 };
292  
293 swphy4: ethernet-phy@4 {
294 reg = <4>;
295 phy-mode = "mii";
296 };
297 };
298 };
299 };
300  
301 &eth1 {
302 compatible = "qca,qca9560-eth", "syscon", "simple-mfd";
303  
304 phy-mode = "gmii";
305  
306 resets = <&rst 13>;
307 reset-names = "mac";
308  
309 status = "disabled";
310  
311 fixed-link {
312 speed = <1000>;
313 full-duplex;
314 };
315 };